FlooNoC: A Fast, Low-Overhead On-chip Network
FlooNoC, is a Network-on-Chip (NoC) research project, which is part of the PULP (Parallel Ultra-Low Power) Platform. The main idea behind FlooNoC is to provide a scalable high-performance NoC for non-coherent systems. FlooNoC was mainly designed to interface with AXI4+ATOPs, but can easily be extended to other On-Chip protocols. FlooNoC already provides network interface IPs (named chimneys) for AXI4 protocol, which converts to a custom-link level protocol that provides significantly better scalability than AXI4. FlooNoC also includes protocol-agnostic routers based on the custom link-level protocol to transport payloads. Finally, FlooNoC also include additional NoC components to assemble a complete NoC in a modular fashion. FlooNoC is also highly flexible and supports a wide variety of topologies and routing algorithms. A Network generation framework called FlooGen makes it possible to easily generate entire networks based on a simple configuration file.
Quick Links
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Setup & Installation
Install Bender for HW IPs and python dependencies for FlooGen
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Hardware IPs
Check out the documentation of FlooNoC hardware IPs.
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Network Generation
Learn how to generate a FlooNoC network using FlooGen
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License
FlooNoC is available open-source on GitHub under permissive licenses.
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Publication
Read the publication of FlooNoC.
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Changelog
Check out what has changed in the latest version of FlooNoC.