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Repository Structure and Contents

This document describes the structure of the repository and the contents of the directories.

The hw hardware directory

The hw directory contains all the hardware-related files for all the SystemVerilog IPs. The directory is structured as follows:

  • *.sv: SystemVerilog packages and modules for the IPs.
  • test: Verification IPs (VIPs) such as monitors, random initiators for the testbenches.
  • tb: Testbenches for the IPs.

The floogen FlooGen directory

The floogen directory contains the Python framework for FlooGen to generate complete FlooNoC networks based on a simple configuration file. The directory is structured as follows:

  • examples: A couple of example configuration files.
  • model: The python models for routers, network interfaces and endpoints that are used by FlooGen.
  • templates: Mako templates for the generation of the SystemVerilog files.
  • tests: Unit tests for the FlooGen framework.
  • floo_gen.py: The main script for FlooGen.
  • config_parser.py: The configuration parser for FlooGen.
  • utils.py: Various utility functions for FlooGen.