Module axi_chan_compare

Non-synthesizable module comparing two AXI channels of the same type

Parameters

`IgnoreId: bit`

Ignore ID field if it was remapped

`AllowReordering: bit`

Allow reordered responses of different IDs,

not compatible with IgnoreId

`IdWidth: int unsigned`

AXI ID Width

`aw_chan_t: type`

`w_chan_t: type`

`b_chan_t: type`

`ar_chan_t: type`

`r_chan_t: type`

`req_t: type`

`resp_t: type`

`NumIds:`

Ports

`clk_a_i: input logic`

`clk_b_i: input logic`

`axi_a_req: input req_t`

`axi_a_res: input resp_t`

`axi_b_req: input req_t`

`axi_b_res: input resp_t`

Signals

`aw_queue: aw_chan_t`

`w_queue: w_chan_t`

`b_queue: b_chan_t`

`ar_queue: ar_chan_t`

`r_queue: r_chan_t`