Module axi_dw_converter_intf
Parameters
AXI_ID_WIDTH: int unsigned
AXI_ADDR_WIDTH: int unsigned
AXI_SLV_PORT_DATA_WIDTH: int unsigned
AXI_MST_PORT_DATA_WIDTH: int unsigned
AXI_USER_WIDTH: int unsigned
AXI_MAX_READS: int unsigned
Ports
clk_i: input logic
rst_ni: input logic
slv: AXI_BUS.Slave
mst: AXI_BUS.Master
Types
| id_t | |
| addr_t | |
| mst_data_t | |
| mst_strb_t | |
| slv_data_t | |
| slv_strb_t | |
| user_t | |
| aw_chan_t | |
| mst_w_chan_t | |
| slv_w_chan_t | |
| b_chan_t | |
| ar_chan_t | |
| mst_r_chan_t | |
| slv_r_chan_t | |
| mst_req_t | |
| mst_resp_t | |
| slv_req_t | |
| slv_resp_t |