Module axi_isolate
This module can isolate the AXI4+ATOPs bus on the master port from the slave port. When the
isolation is not active, the two ports are directly connected.
This module counts how many open transactions are currently in flight on the read and write
channels. It is further capable of tracking the amount of open atomic transactions with read
responses.
The isolation interface has two signals: isolate_i
and isolated_o
. When isolate_i
is
asserted, all open transactions are gracefully terminated. When no transactions are in flight
anymore, the isolated_o
output is asserted. As long as isolated_o
is asserted, all output
signals in mst_req_o
are silenced to '0
. When isolated, new transactions initiated on the
slave port are stalled until the isolation is terminated by deasserting isolate_i
.
Response
If the TerminateTransaction
parameter is set to 1'b1
, the module will return response errors
in case there is an incoming transaction while the module isolates. The data returned on the
bus is 1501A7ED
(hexspeak for isolated).
If TerminateTransaction
is set to 1'b0
, the transaction will block indefinitely until the
module is de-isolated again.
Parameters
NumPending: int unsigned
Maximum number of pending requests per channel
TerminateTransaction: bit
Gracefully terminate all incoming transactions in case of isolation by returning proper error
responses.
AtopSupport: bit
Support atomic operations (ATOPs)
AxiAddrWidth: int signed
Address width of all AXI4+ATOP ports
AxiDataWidth: int signed
Data width of all AXI4+ATOP ports
AxiIdWidth: int signed
ID width of all AXI4+ATOP ports
AxiUserWidth: int signed
User signal width of all AXI4+ATOP ports
axi_req_t: type
Request struct type of all AXI4+ATOP ports
axi_resp_t: type
Response struct type of all AXI4+ATOP ports
Ports
clk_i: input logic
Rising-edge clock of all ports
rst_ni: input logic
Asynchronous reset, active low
slv_req_i: input axi_req_t
Slave port request
slv_resp_o: output axi_resp_t
Slave port response
mst_req_o: output axi_req_t
Master port request
mst_resp_i: input axi_resp_t
Master port response
isolate_i: input logic
Isolate master port from slave port
isolated_o: output logic
Master port is isolated from slave port
Types
id_t | |
addr_t | |
data_t | |
strb_t | |
user_t | |
aw_chan_t | |
w_chan_t | |
b_chan_t | |
ar_chan_t | |
r_chan_t |