Module axi_lite_mailbox

Parameters

MailboxDepth: int unsigned

IrqEdgeTrig: bit unsigned

IrqActHigh: bit unsigned

AxiAddrWidth: int unsigned

AxiDataWidth: int unsigned

req_lite_t: type

resp_lite_t: type

addr_t: type

FifoUsageWidth: int unsigned

Ports

clk_i: input logic

rst_ni: input logic

test_i: input logic

slv_reqs_i: input req_lite_t [1:0]

slv_resps_o: output resp_lite_t [1:0]

irq_o: output logic [1:0]

base_addr_i: input addr_t [1:0]

Types

data_t
usage_t