Module axi_lite_mux_intf

Parameters

AxiAddrWidth: int unsigned

AxiDataWidth: int unsigned

NoSlvPorts: int unsigned

MaxTrans: int unsigned

FallThrough: bit

SpillAw: bit

SpillW: bit

SpillB: bit

SpillAr: bit

SpillR: bit

Ports

clk_i: input logic

rst_ni: input logic

test_i: input logic

slv: AXI_LITE.Slave

mst: AXI_LITE.Master

Types

addr_t
data_t
strb_t
aw_chan_t
w_chan_t
b_chan_t
ar_chan_t
r_chan_t
axi_req_t
axi_resp_t

Signals

mst_req: axi_req_t

mst_resp: axi_resp_t