Module axi_mux_intf
Parameters
SLV_AXI_ID_WIDTH: int unsigned
MST_AXI_ID_WIDTH: int unsigned
AXI_ADDR_WIDTH: int unsigned
AXI_DATA_WIDTH: int unsigned
AXI_USER_WIDTH: int unsigned
NO_SLV_PORTS: int unsigned
MAX_W_TRANS: int unsigned
FALL_THROUGH: bit
SPILL_AW: bit
SPILL_W: bit
SPILL_B: bit
SPILL_AR: bit
SPILL_R: bit
Ports
clk_i: input logic
rst_ni: input logic
test_i: input logic
slv: AXI_BUS.Slave
mst: AXI_BUS.Master
Types
| slv_id_t | |
| mst_id_t | |
| addr_t | |
| data_t | |
| strb_t | |
| user_t | |
| slv_aw_chan_t | |
| mst_aw_chan_t | |
| w_chan_t | |
| slv_b_chan_t | |
| mst_b_chan_t | |
| slv_ar_chan_t | |
| mst_ar_chan_t | |
| slv_r_chan_t | |
| mst_r_chan_t | |
| slv_req_t | |
| slv_resp_t | |
| mst_req_t | |
| mst_resp_t |