Module axi_to_detailed_mem_intf
Interface wrapper for module axi_to_mem.
Parameters
ADDR_WIDTH: int unsigned
See axi_to_mem, parameter AddrWidth.
DATA_WIDTH: int unsigned
See axi_to_mem, parameter DataWidth.
ID_WIDTH: int unsigned
AXI4+ATOP ID width.
USER_WIDTH: int unsigned
AXI4+ATOP user width.
NUM_BANKS: int unsigned
See axi_to_mem, parameter NumBanks.
BUF_DEPTH: int unsigned
See axi_to_mem, parameter BufDepth.
HIDE_STRB: bit
Hide write requests if the strb == ’0
OUT_FIFO_DEPTH: int unsigned
Depth of output fifo/fall_through_register. Increase for asymmetric backpressure (contention) on banks.
addr_t: type
Dependent parameter, do not override. See axi_to_mem, parameter addr_t.
mem_data_t: type
Dependent parameter, do not override. See axi_to_mem, parameter mem_data_t.
mem_strb_t: type
Dependent parameter, do not override. See axi_to_mem, parameter mem_strb_t.
Ports
clk_i: input logic
Clock input.
rst_ni: input logic
Asynchronous reset, active low.
busy_o: output logic
See axi_to_mem, port busy_o.
slv: AXI_BUS.Slave
AXI4+ATOP slave interface port.
mem_req_o: output logic [NUM_BANKS-1:0]
See axi_to_mem, port mem_req_o.
mem_gnt_i: input logic [NUM_BANKS-1:0]
See axi_to_mem, port mem_gnt_i.
mem_addr_o: output addr_t [NUM_BANKS-1:0]
See axi_to_mem, port mem_addr_o.
mem_wdata_o: output mem_data_t [NUM_BANKS-1:0]
See axi_to_mem, port mem_wdata_o.
mem_strb_o: output mem_strb_t [NUM_BANKS-1:0]
See axi_to_mem, port mem_strb_o.
mem_atop_o: output axi_pkg::atop_t [NUM_BANKS-1:0]
See axi_to_mem, port mem_atop_o.
mem_lock_o: output logic [NUM_BANKS-1:0]
See axi_to_mem, port mem_lock_o.
mem_we_o: output logic [NUM_BANKS-1:0]
See axi_to_mem, port mem_we_o.
mem_id_o: output logic [NUM_BANKS-1:0]
See axi_to_mem, port mem_id_o.
mem_user_o: output logic [NUM_BANKS-1:0]
See axi_to_mem, port mem_user_o.
mem_cache_o: output axi_pkg::cache_t [NUM_BANKS-1:0]
See axi_to_mem, port mem_cache_o.
mem_prot_o: output axi_pkg::prot_t [NUM_BANKS-1:0]
See axi_to_mem, port mem_prot_o.
mem_qos_o: output axi_pkg::qos_t [NUM_BANKS-1:0]
See axi_to_mem, port mem_qos_o.
mem_region_o: output axi_pkg::region_t [NUM_BANKS-1:0]
See axi_to_mem, port mem_region_o.
mem_rvalid_i: input logic [NUM_BANKS-1:0]
See axi_to_mem, port mem_rvalid_i.
mem_rdata_i: input mem_data_t [NUM_BANKS-1:0]
See axi_to_mem, port mem_rdata_i.
mem_err_i: input logic [NUM_BANKS-1:0]
See axi_to_mem, port mem_err_i.
mem_exokay_i: input logic [NUM_BANKS-1:0]
See axi_to_mem, port mem_exokay_i.
Types
| id_t | |
| data_t | |
| strb_t | |
| user_t | |
| aw_chan_t | |
| w_chan_t | |
| b_chan_t | |
| ar_chan_t | |
| r_chan_t | |
| req_t | |
| resp_t |