Module axi_xbar_intf

Parameters

AXI_USER_WIDTH: int unsigned

Cfg: axi_pkg::xbar_cfg_t

ATOPS: bit

CONNECTIVITY: bit [Cfg.NoSlvPorts-1:0][Cfg.NoMstPorts-1:0]

rule_t: type

AxiIdWidthMstPorts: int unsigned

Ports

clk_i: input logic

rst_ni: input logic

test_i: input logic

slv_ports: AXI_BUS.Slave

mst_ports: AXI_BUS.Master

addr_map_i: input rule_t [Cfg.NoAddrRules-1:0]

en_default_mst_port_i: input logic [Cfg.NoSlvPorts-1:0]

default_mst_port_i: input logic [Cfg.NoSlvPorts-1:0][idx_width(Cfg.NoMstPorts)-1:0]

Types

id_mst_t
id_slv_t
addr_t
data_t
strb_t
user_t
mst_aw_chan_t
slv_aw_chan_t
w_chan_t
mst_b_chan_t
slv_b_chan_t
mst_ar_chan_t
slv_ar_chan_t
mst_r_chan_t
slv_r_chan_t
mst_req_t
slv_req_t
mst_resp_t
slv_resp_t