Hyperbus

group HyperBus Driver

HyperBus register definitions for Chimera-SDK.

This file defines register offsets and fields for an APB-based HyperBus peripheral. It is used in conjunction with the HyperBus driver to configure and interact with the hardware.

Defines

HYPERBUS_NUM_PHYS

HYPERBUS_NUM_CHIPS

Functions

static inline void hyperbus_set_t_latency_access(void *base, uint32_t val)

Set the latency access time for HyperBus transactions.

Parameters:

base – [in] Base address of the HyperBus peripheral
val – [in] Latency access time value (4-bit field)

static inline uint32_t hyperbus_get_t_latency_access(void *base)

Get the latency access time for HyperBus transactions.

Parameters:: base – [in] Base address of the HyperBus peripheral
Returns:: Latency access time value (4-bit field)

static inline void hyperbus_set_en_latency_additional(void *base, uint32_t val)

Enable or disable additional latency compensation.

Parameters:

base – [in] Base address of the HyperBus peripheral
val – [in] Enable flag (1-bit field, 0 = disabled, 1 = enabled)

static inline uint32_t hyperbus_get_en_latency_additional(void *base)

Get the additional latency compensation enable status.

Parameters:: base – [in] Base address of the HyperBus peripheral
Returns:: Enable status (1-bit field, 0 = disabled, 1 = enabled)

static inline void hyperbus_set_t_burst_max(void *base, uint32_t val)

Set the maximum burst length for HyperBus transfers.

Parameters:

base – [in] Base address of the HyperBus peripheral
val – [in] Maximum burst length value (16-bit field)

static inline uint32_t hyperbus_get_t_burst_max(void *base)

Get the maximum burst length for HyperBus transfers.

Parameters:: base – [in] Base address of the HyperBus peripheral
Returns:: Maximum burst length value (16-bit field)

static inline void hyperbus_set_t_read_write_recovery(void *base, uint32_t val)

Set the read/write recovery time.

Parameters:

base – [in] Base address of the HyperBus peripheral
val – [in] Read/write recovery time value (4-bit field)

static inline uint32_t hyperbus_get_t_read_write_recovery(void *base)

Get the read/write recovery time.

Parameters:: base – [in] Base address of the HyperBus peripheral
Returns:: Read/write recovery time value (4-bit field)

static inline void hyperbus_set_t_rx_clk_delay(void *base, uint32_t val)

Set the receive clock delay for HyperBus data.

Parameters:

base – [in] Base address of the HyperBus peripheral
val – [in] RX clock delay value (4-bit field)

static inline uint32_t hyperbus_get_t_rx_clk_delay(void *base)

Get the receive clock delay for HyperBus data.

Parameters:: base – [in] Base address of the HyperBus peripheral
Returns:: RX clock delay value (4-bit field)

static inline void hyperbus_set_t_tx_clk_delay(void *base, uint32_t val)

Set the transmit clock delay for HyperBus data.

Parameters:

base – [in] Base address of the HyperBus peripheral
val – [in] TX clock delay value (4-bit field)

static inline uint32_t hyperbus_get_t_tx_clk_delay(void *base)

Get the transmit clock delay for HyperBus data.

Parameters:: base – [in] Base address of the HyperBus peripheral
Returns:: TX clock delay value (4-bit field)

static inline void hyperbus_set_address_mask_msb(void *base, uint32_t val)

Set the address mask MSB for address decoding.

Parameters:

base – [in] Base address of the HyperBus peripheral
val – [in] Address mask MSB value (5-bit field)

static inline uint32_t hyperbus_get_address_mask_msb(void *base)

Get the address mask MSB for address decoding.

Parameters:: base – [in] Base address of the HyperBus peripheral
Returns:: Address mask MSB value (5-bit field)

static inline void hyperbus_set_address_space(void *base, uint32_t val)

Set the address space configuration.

Parameters:

base – [in] Base address of the HyperBus peripheral
val – [in] Address space value (1-bit field)

static inline uint32_t hyperbus_get_address_space(void *base)

Get the address space configuration.

Parameters:: base – [in] Base address of the HyperBus peripheral
Returns:: Address space value (1-bit field)

static inline void hyperbus_set_phys_in_use(void *base, uint32_t val)

Set which physical interfaces are in use.

Parameters:

base – [in] Base address of the HyperBus peripheral
val – [in] Physical interfaces in use bitmask (1-bit field)

static inline uint32_t hyperbus_get_phys_in_use(void *base)

Get which physical interfaces are in use.

Parameters:: base – [in] Base address of the HyperBus peripheral
Returns:: Physical interfaces in use bitmask (1-bit field)

static inline void hyperbus_set_which_phy(void *base, uint32_t val)

Set the active physical interface.

Parameters:

base – [in] Base address of the HyperBus peripheral
val – [in] Active PHY index (1-bit field)

static inline uint32_t hyperbus_get_which_phy(void *base)

Get the active physical interface.

Parameters:: base – [in] Base address of the HyperBus peripheral
Returns:: Active PHY index (1-bit field)

static inline void hyperbus_set_t_csh_cycles(void *base, uint32_t val)

Set the chip select hold time in cycles.

Parameters:

base – [in] Base address of the HyperBus peripheral
val – [in] Chip select hold time (4-bit field)

static inline uint32_t hyperbus_get_t_csh_cycles(void *base)

Get the chip select hold time in cycles.

Parameters:: base – [in] Base address of the HyperBus peripheral
Returns:: Chip select hold time (4-bit field)

static inline void hyperbus_set_chip_start(void *base, uint32_t chip, uint32_t start_addr)

Set the start address for a chip’s address window.

Parameters:

base – [in] Base address of the HyperBus peripheral
chip – [in] Chip index (0 to HYPERBUS_NUM_CHIPS - 1)
start_addr – [in] Start address of the chip’s memory window

static inline uint32_t hyperbus_get_chip_start(void *base, uint32_t chip)

Get the start address for a chip’s address window.

Parameters:

base – [in] Chip index (0 to HYPERBUS_NUM_CHIPS - 1)
chip – [in] Chip index

Returns:

Start address of the chip’s memory window

static inline void hyperbus_set_chip_end(void *base, uint32_t chip, uint32_t end_addr_noninclusive)

Set the end address for a chip’s address window.

Parameters:

base – [in] Base address of the HyperBus peripheral
chip – [in] Chip index (0 to HYPERBUS_NUM_CHIPS - 1)
end_addr_noninclusive – [in] End address (non-inclusive) of the chip’s memory window

static inline uint32_t hyperbus_get_chip_end(void *base, uint32_t chip)

Get the end address for a chip’s address window.

Parameters:

base – [in] Base address of the HyperBus peripheral
chip – [in] Chip index (0 to HYPERBUS_NUM_CHIPS - 1)

Returns:

End address (non-inclusive) of the chip’s memory window

static inline void hyperbus_set_chip_range(void *base, uint32_t chip, uint32_t start_addr, uint32_t end_addr_noninclusive)

Set both start and end addresses for a chip’s address window.

Parameters:

base – [in] Base address of the HyperBus peripheral
chip – [in] Chip index (0 to HYPERBUS_NUM_CHIPS - 1)
start_addr – [in] Start address of the chip’s memory window
end_addr_noninclusive – [in] End address (non-inclusive) of the chip’s memory window

void hyperram_cfg_default(hyperram_cfg_t *cfg, uint32_t chip_base, uint32_t chip_size)

Initialize HyperRAM configuration with default values.

Sets up sensible defaults for a HyperRAM device with the specified base address and size.

Parameters:

cfg – [out] Pointer to the configuration structure to initialize
chip_base – [in] Physical base address of the chip
chip_size – [in] Size of the chip’s address space in bytes

hyperram_cfg_t hyperram_cfg_read(void *base)

Read the current HyperRAM configuration from hardware.

Reads all configuration registers from the HyperBus peripheral and returns a populated configuration structure.

Parameters:: base – [in] Base address of the HyperBus peripheral
Returns:: Configuration structure containing the hardware settings

int hyperram_cfg_write(void *base, const hyperram_cfg_t *cfg)

Write a HyperRAM configuration to hardware.

Applies a complete configuration to the HyperBus peripheral by writing all configuration registers.

Parameters:

base – [in] Base address of the HyperBus peripheral
cfg – [in] Pointer to the configuration structure to apply

Returns:

0 on success, non-zero error code on failure

void hyperram_cfg_print(void *base)

Print the current HyperRAM configuration to output.

Reads the hardware configuration and displays all registers and settings in a human-readable format.

Parameters:: base – [in] Base address of the HyperBus peripheral

struct hyperram_cfg_t: #include <hyperbus.h>