iDMA: An intelligent AXI Direct Memory Access unit
An intelligent, configurable & modular DMA based on an AXI memory interface.
Overview
This DMA is split into two groups of modules to combine reusability with a generic programming interface. The modules of the backend provide the basics of moving data over an on-chip interconnect. The modules of the frontend implement the programming interface and can be customized depending on the needs of a project. An optional midend can be added to allow for translation of N-D requests from the frontend to the 1-D requests accepted by the backend.
Philosophy / Idea
clear interfaces, whenever possible using existing standards
modular -> one hardware fits all
adaptable and extensible
extensively verified
clean code
minimal hardware
Docs
The main documentation of the submodules is divided into the following sections:
The morty docs provide the generated description of the SystemVerilog files within this repository.
