Module idma_channel_coupler
Couples the R
to the AW
channel by keeping writes back until the corresponding
reads arrive at the DMA. This reduces the congestion in the memory system.
Parameters
NumAxInFlight: int unsigned
Number of transaction that can be in-flight concurrently
AddrWidth: int unsigned
Address width
UserWidth: int unsigned
AXI user width
AxiIdWidth: int unsigned
AXI ID width
PrintFifoInfo: bit
Print the info of the FIFO configuration
axi_aw_chan_t: type
AXI 4 AW
channel type
CounterWidth: int unsigned
The width of the credit counter keeping track of the transfers
Ports
clk_i: input logic
Clock
rst_ni: input logic
Asynchronous reset, active low
testmode_i: input logic
Testmode in
r_rsp_valid_i: input logic
R response valid
r_rsp_ready_i: input logic
R response ready
r_rsp_first_i: input logic
First R response
r_decouple_aw_i: input logic
Did the read originate from a decoupled request
aw_decouple_aw_i: input logic
Is the AW
in the queue a decoupled request?
aw_req_i: input axi_aw_chan_t
Original meta request
aw_valid_i: input logic
Original meta request valid
aw_ready_o: output logic
Original meta request ready
aw_req_o: output axi_aw_chan_t
Modified meta request
aw_valid_o: output logic
Modified meta request valid
aw_ready_i: input logic
Modified meta request ready
busy_o: output logic
busy signal
Types
cnt_t | Credit counter type |
addr_t | Address type |
user_t | User type |
id_t | ID type |