Module idma_reg32_3d

Description: Register-based front-end for iDMA

Parameters

NumRegs: int unsigned

Number of configuration register ports

NumStreams: int unsigned

Number of streams (max 16)

IdCounterWidth: int unsigned

Width of the transfer id (max 32-bit)

StreamWidth: int unsigned

Dependent parameter: Stream Idx

reg_req_t: type

Register_interface request type

reg_rsp_t: type

Register_interface response type

dma_req_t: type

DMA 1d or ND burst request type

cnt_width_t: type

Dependent type for IdCounterWidth

stream_t: type

Dependent type for StreamWidth

MaxNumStreams: int unsigned

Maximum number of streams is set to 16. It can be enlarged, but the register file

needs to be adapted too.

Ports

clk_i: input logic

rst_ni: input logic

dma_ctrl_req_i: input reg_req_t [NumRegs-1:0]

Register interface control slave

dma_ctrl_rsp_o: output reg_rsp_t [NumRegs-1:0]

dma_req_o: output dma_req_t

Request signals

req_valid_o: output logic

req_ready_i: input logic

next_id_i: input cnt_width_t

stream_idx_o: output stream_t

done_id_i: input cnt_width_t [NumStreams-1:0]

Status signals

busy_i: input idma_pkg::idma_busy_t [NumStreams-1:0]

midend_busy_i: input logic [NumStreams-1:0]