Module idma_desc64_reader
This module takes in an AXI R-channel, and reads descriptors from it.
Note that an using an address width other than 64 bits will need
modifications.
Parameters
AddrWidth: int unsigned
Address width of the AXI bus
DataWidth: int unsigned
Data width of the AXI bus
idma_req_t: type
iDMA request type
axi_r_chan_t: type
AXI R channel type
descriptor_t: type
Configuration descriptor type
addr_t: type
AXI bus address type, derived from the address width
Ports
clk_i: input logic
clock
rst_ni: input logic
reset
r_chan_i: input axi_r_chan_t
axi read channel
r_chan_valid_i: input logic
read channel valid
r_chan_ready_o: output logic
read channel ready
idma_req_o: output idma_req_t
idma request
idma_req_valid_o: output logic
idma request valid
idma_req_ready_i: input logic
idma request ready
NOTE: we assume that if a read was launched,
the connected fifo has still space left, i.e. this signal is always
1 if a request is in-flight. If a request is in-flight and there
is not enough space in the fifo, we will either stall the bus or
drop the request.
next_descriptor_addr_o: output addr_t
location of the next descriptor address
next_descriptor_addr_valid_o: output logic
whether next_descriptor_addr is valid
do_irq_o: output logic
whether this descriptor needs an IRQ raised
do_irq_valid_o: output logic
whether do_irq_o is valid
idma_req_inflight_o: output logic
whether a request is in-flight