Module idma_transport_layer_r_axi_rw_init_rw_obi
Implementing the transport layer in the iDMA backend.
Parameters
NumAxInFlight: int unsigned
Number of transaction that can be in-flight concurrently
DataWidth: int unsigned
Data width
BufferDepth: int unsigned
The depth of the internal reorder buffer:
-
‘2’: minimal possible configuration
-
‘3’: efficiently handle misaligned transfers (recommended)
MaskInvalidData: bit
Mask invalid data on the manager interface
PrintFifoInfo: bit
Print the info of the FIFO configuration
r_dp_req_t: type
r_dp_req_t
type:
w_dp_req_t: type
w_dp_req_t
type:
r_dp_rsp_t: type
r_dp_rsp_t
type:
w_dp_rsp_t: type
w_dp_rsp_t
type:
write_meta_channel_t: type
Write Meta channel type
write_meta_channel_tagged_t: type
read_meta_channel_t: type
Read Meta channel type
read_meta_channel_tagged_t: type
axi_req_t: type
AXI4+ATOP Request and Response channel type
axi_rsp_t: type
init_req_t: type
Memory Init Request and Response channel type
init_rsp_t: type
obi_req_t: type
OBI Request and Response channel type
obi_rsp_t: type
StrbWidth: int unsigned
Stobe width
Ports
clk_i: input logic
Clock
rst_ni: input logic
Asynchronous reset, active low
testmode_i: input logic
Testmode in
axi_read_req_o: output axi_req_t
AXI4+ATOP read request
axi_read_rsp_i: input axi_rsp_t
AXI4+ATOP read response
init_read_req_o: output init_req_t
Memory Init read request
init_read_rsp_i: input init_rsp_t
Memory Init read response
obi_read_req_o: output obi_req_t
OBI read request
obi_read_rsp_i: input obi_rsp_t
OBI read response
init_write_req_o: output init_req_t
Memory Init write request
init_write_rsp_i: input init_rsp_t
Memory Init write response
obi_write_req_o: output obi_req_t
OBI write request
obi_write_rsp_i: input obi_rsp_t
OBI write response
r_dp_req_i: input r_dp_req_t
Read datapath request
r_dp_valid_i: input logic
Read datapath request valid
r_dp_ready_o: output logic
Read datapath request ready
r_dp_rsp_o: output r_dp_rsp_t
Read datapath response
r_dp_valid_o: output logic
Read datapath response valid
r_dp_ready_i: input logic
Read datapath response valid
w_dp_req_i: input w_dp_req_t
Write datapath request
w_dp_valid_i: input logic
Write datapath request valid
w_dp_ready_o: output logic
Write datapath request ready
w_dp_rsp_o: output w_dp_rsp_t
Write datapath response
w_dp_valid_o: output logic
Write datapath response valid
w_dp_ready_i: input logic
Write datapath response valid
ar_req_i: input read_meta_channel_tagged_t
Read meta request
ar_valid_i: input logic
Read meta request valid
ar_ready_o: output logic
Read meta request ready
aw_req_i: input write_meta_channel_tagged_t
Write meta request
aw_valid_i: input logic
Write meta request valid
aw_ready_o: output logic
Write meta request ready
dp_poison_i: input logic
Datapath poison signal
r_chan_ready_o: output logic
Response channel valid and ready
r_chan_valid_o: output logic
r_dp_busy_o: output logic
Read part of the datapath is busy
w_dp_busy_o: output logic
Write part of the datapath is busy
buffer_busy_o: output logic
Buffer is busy
Types
data_t | Data type |
strb_t | Offset type |
byte_t | Byte type |