## Summary | Name | Offset | Length | Description | |:--------------------------------------------------------|:---------|---------:|:-----------------------------------------------------------------------| | idma_reg64_2d.[`conf`](#conf) | 0x0 | 4 | Configuration Register for DMA settings | | idma_reg64_2d.[`status_0`](#status) | 0x4 | 4 | DMA Status | | idma_reg64_2d.[`status_1`](#status) | 0x8 | 4 | DMA Status | | idma_reg64_2d.[`status_2`](#status) | 0xc | 4 | DMA Status | | idma_reg64_2d.[`status_3`](#status) | 0x10 | 4 | DMA Status | | idma_reg64_2d.[`status_4`](#status) | 0x14 | 4 | DMA Status | | idma_reg64_2d.[`status_5`](#status) | 0x18 | 4 | DMA Status | | idma_reg64_2d.[`status_6`](#status) | 0x1c | 4 | DMA Status | | idma_reg64_2d.[`status_7`](#status) | 0x20 | 4 | DMA Status | | idma_reg64_2d.[`status_8`](#status) | 0x24 | 4 | DMA Status | | idma_reg64_2d.[`status_9`](#status) | 0x28 | 4 | DMA Status | | idma_reg64_2d.[`status_10`](#status) | 0x2c | 4 | DMA Status | | idma_reg64_2d.[`status_11`](#status) | 0x30 | 4 | DMA Status | | idma_reg64_2d.[`status_12`](#status) | 0x34 | 4 | DMA Status | | idma_reg64_2d.[`status_13`](#status) | 0x38 | 4 | DMA Status | | idma_reg64_2d.[`status_14`](#status) | 0x3c | 4 | DMA Status | | idma_reg64_2d.[`status_15`](#status) | 0x40 | 4 | DMA Status | | idma_reg64_2d.[`next_id_0`](#next_id) | 0x44 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_1`](#next_id) | 0x48 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_2`](#next_id) | 0x4c | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_3`](#next_id) | 0x50 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_4`](#next_id) | 0x54 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_5`](#next_id) | 0x58 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_6`](#next_id) | 0x5c | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_7`](#next_id) | 0x60 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_8`](#next_id) | 0x64 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_9`](#next_id) | 0x68 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_10`](#next_id) | 0x6c | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_11`](#next_id) | 0x70 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_12`](#next_id) | 0x74 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_13`](#next_id) | 0x78 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_14`](#next_id) | 0x7c | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`next_id_15`](#next_id) | 0x80 | 4 | Next ID, launches transfer, returns 0 if transfer not set up properly. | | idma_reg64_2d.[`done_id_0`](#done_id) | 0x84 | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_1`](#done_id) | 0x88 | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_2`](#done_id) | 0x8c | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_3`](#done_id) | 0x90 | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_4`](#done_id) | 0x94 | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_5`](#done_id) | 0x98 | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_6`](#done_id) | 0x9c | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_7`](#done_id) | 0xa0 | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_8`](#done_id) | 0xa4 | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_9`](#done_id) | 0xa8 | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_10`](#done_id) | 0xac | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_11`](#done_id) | 0xb0 | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_12`](#done_id) | 0xb4 | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_13`](#done_id) | 0xb8 | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_14`](#done_id) | 0xbc | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`done_id_15`](#done_id) | 0xc0 | 4 | Get ID of finished transactions. | | idma_reg64_2d.[`dst_addr_low`](#dst_addr_low) | 0xd0 | 4 | Low destination address | | idma_reg64_2d.[`dst_addr_high`](#dst_addr_high) | 0xd4 | 4 | High destination address | | idma_reg64_2d.[`src_addr_low`](#src_addr_low) | 0xd8 | 4 | Low source address | | idma_reg64_2d.[`src_addr_high`](#src_addr_high) | 0xdc | 4 | High source address | | idma_reg64_2d.[`length_low`](#length_low) | 0xe0 | 4 | Low transfer length in byte | | idma_reg64_2d.[`length_high`](#length_high) | 0xe4 | 4 | High transfer length in byte | | idma_reg64_2d.[`dst_stride_2_low`](#dst_stride_2_low) | 0xe8 | 4 | Low destination stride dimension 2 | | idma_reg64_2d.[`dst_stride_2_high`](#dst_stride_2_high) | 0xec | 4 | High destination stride dimension 2 | | idma_reg64_2d.[`src_stride_2_low`](#src_stride_2_low) | 0xf0 | 4 | Low source stride dimension 2 | | idma_reg64_2d.[`src_stride_2_high`](#src_stride_2_high) | 0xf4 | 4 | High source stride dimension 2 | | idma_reg64_2d.[`reps_2_low`](#reps_2_low) | 0xf8 | 4 | Low number of repetitions dimension 2 | | idma_reg64_2d.[`reps_2_high`](#reps_2_high) | 0xfc | 4 | High number of repetitions dimension 2 | ## conf Configuration Register for DMA settings - Offset: `0x0` - Reset default: `0x0` - Reset mask: `0x1ffff` ### Fields ```wavejson {"reg": [{"name": "decouple_aw", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "decouple_rw", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "src_reduce_len", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "dst_reduce_len", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "src_max_llen", "bits": 3, "attr": ["rw"], "rotate": -90}, {"name": "dst_max_llen", "bits": 3, "attr": ["rw"], "rotate": -90}, {"name": "enable_nd", "bits": 1, "attr": ["rw"], "rotate": -90}, {"name": "src_protocol", "bits": 3, "attr": ["rw"], "rotate": -90}, {"name": "dst_protocol", "bits": 3, "attr": ["rw"], "rotate": -90}, {"bits": 15}], "config": {"lanes": 1, "fontsize": 10, "vspace": 160}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:---------------|:---------------------------------------------| | 31:17 | | | | Reserved | | 16:14 | rw | x | dst_protocol | Selection of the destination protocol | | 13:11 | rw | x | src_protocol | Selection of the source protocol | | 10 | rw | x | enable_nd | ND-extension enabled | | 9:7 | rw | x | dst_max_llen | Maximal logarithmic destination burst length | | 6:4 | rw | x | src_max_llen | Maximal logarithmic source burst length | | 3 | rw | x | dst_reduce_len | Reduce maximal destination burst length | | 2 | rw | x | src_reduce_len | Reduce maximal source burst length | | 1 | rw | x | decouple_rw | Decouple R-W | | 0 | rw | x | decouple_aw | Decouple R-AW | ## status DMA Status - Reset default: `0x0` - Reset mask: `0x3ff` ### Instances | Name | Offset | |:----------|:---------| | status_0 | 0x4 | | status_1 | 0x8 | | status_2 | 0xc | | status_3 | 0x10 | | status_4 | 0x14 | | status_5 | 0x18 | | status_6 | 0x1c | | status_7 | 0x20 | | status_8 | 0x24 | | status_9 | 0x28 | | status_10 | 0x2c | | status_11 | 0x30 | | status_12 | 0x34 | | status_13 | 0x38 | | status_14 | 0x3c | | status_15 | 0x40 | ### Fields ```wavejson {"reg": [{"name": "busy", "bits": 10, "attr": ["ro"], "rotate": 0}, {"bits": 22}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:-------|:--------------| | 31:10 | | | | Reserved | | 9:0 | ro | x | busy | DMA busy | ## next_id Next ID, launches transfer, returns 0 if transfer not set up properly. - Reset default: `0x0` - Reset mask: `0xffffffff` ### Instances | Name | Offset | |:-----------|:---------| | next_id_0 | 0x44 | | next_id_1 | 0x48 | | next_id_2 | 0x4c | | next_id_3 | 0x50 | | next_id_4 | 0x54 | | next_id_5 | 0x58 | | next_id_6 | 0x5c | | next_id_7 | 0x60 | | next_id_8 | 0x64 | | next_id_9 | 0x68 | | next_id_10 | 0x6c | | next_id_11 | 0x70 | | next_id_12 | 0x74 | | next_id_13 | 0x78 | | next_id_14 | 0x7c | | next_id_15 | 0x80 | ### Fields ```wavejson {"reg": [{"name": "next_id", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:--------|:-----------------------------------------------------------------------| | 31:0 | ro | x | next_id | Next ID, launches transfer, returns 0 if transfer not set up properly. | ## done_id Get ID of finished transactions. - Reset default: `0x0` - Reset mask: `0xffffffff` ### Instances | Name | Offset | |:-----------|:---------| | done_id_0 | 0x84 | | done_id_1 | 0x88 | | done_id_2 | 0x8c | | done_id_3 | 0x90 | | done_id_4 | 0x94 | | done_id_5 | 0x98 | | done_id_6 | 0x9c | | done_id_7 | 0xa0 | | done_id_8 | 0xa4 | | done_id_9 | 0xa8 | | done_id_10 | 0xac | | done_id_11 | 0xb0 | | done_id_12 | 0xb4 | | done_id_13 | 0xb8 | | done_id_14 | 0xbc | | done_id_15 | 0xc0 | ### Fields ```wavejson {"reg": [{"name": "done_id", "bits": 32, "attr": ["ro"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:--------|:---------------------------------| | 31:0 | ro | x | done_id | Get ID of finished transactions. | ## dst_addr_low Low destination address - Offset: `0xd0` - Reset default: `0x0` - Reset mask: `0xffffffff` ### Fields ```wavejson {"reg": [{"name": "dst_addr_low", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:-------------|:------------------------| | 31:0 | rw | 0x0 | dst_addr_low | Low destination address | ## dst_addr_high High destination address - Offset: `0xd4` - Reset default: `0x0` - Reset mask: `0xffffffff` ### Fields ```wavejson {"reg": [{"name": "dst_addr_high", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:--------------|:-------------------------| | 31:0 | rw | 0x0 | dst_addr_high | High destination address | ## src_addr_low Low source address - Offset: `0xd8` - Reset default: `0x0` - Reset mask: `0xffffffff` ### Fields ```wavejson {"reg": [{"name": "src_addr_low", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:-------------|:-------------------| | 31:0 | rw | 0x0 | src_addr_low | Low source address | ## src_addr_high High source address - Offset: `0xdc` - Reset default: `0x0` - Reset mask: `0xffffffff` ### Fields ```wavejson {"reg": [{"name": "src_addr_high", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:--------------|:--------------------| | 31:0 | rw | 0x0 | src_addr_high | High source address | ## length_low Low transfer length in byte - Offset: `0xe0` - Reset default: `0x0` - Reset mask: `0xffffffff` ### Fields ```wavejson {"reg": [{"name": "length_low", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:-----------|:----------------------------| | 31:0 | rw | 0x0 | length_low | Low transfer length in byte | ## length_high High transfer length in byte - Offset: `0xe4` - Reset default: `0x0` - Reset mask: `0xffffffff` ### Fields ```wavejson {"reg": [{"name": "length_high", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:------------|:-----------------------------| | 31:0 | rw | 0x0 | length_high | High transfer length in byte | ## dst_stride_2_low Low destination stride dimension 2 - Offset: `0xe8` - Reset default: `0x0` - Reset mask: `0xffffffff` ### Fields ```wavejson {"reg": [{"name": "dst_stride_2_low", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:-----------------|:-----------------------------------| | 31:0 | rw | 0x0 | dst_stride_2_low | Low destination stride dimension 2 | ## dst_stride_2_high High destination stride dimension 2 - Offset: `0xec` - Reset default: `0x0` - Reset mask: `0xffffffff` ### Fields ```wavejson {"reg": [{"name": "dst_stride_2_high", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:------------------|:------------------------------------| | 31:0 | rw | 0x0 | dst_stride_2_high | High destination stride dimension 2 | ## src_stride_2_low Low source stride dimension 2 - Offset: `0xf0` - Reset default: `0x0` - Reset mask: `0xffffffff` ### Fields ```wavejson {"reg": [{"name": "src_stride_2_low", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:-----------------|:------------------------------| | 31:0 | rw | 0x0 | src_stride_2_low | Low source stride dimension 2 | ## src_stride_2_high High source stride dimension 2 - Offset: `0xf4` - Reset default: `0x0` - Reset mask: `0xffffffff` ### Fields ```wavejson {"reg": [{"name": "src_stride_2_high", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:------------------|:-------------------------------| | 31:0 | rw | 0x0 | src_stride_2_high | High source stride dimension 2 | ## reps_2_low Low number of repetitions dimension 2 - Offset: `0xf8` - Reset default: `0x0` - Reset mask: `0xffffffff` ### Fields ```wavejson {"reg": [{"name": "reps_2_low", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:-----------|:--------------------------------------| | 31:0 | rw | 0x0 | reps_2_low | Low number of repetitions dimension 2 | ## reps_2_high High number of repetitions dimension 2 - Offset: `0xfc` - Reset default: `0x0` - Reset mask: `0xffffffff` ### Fields ```wavejson {"reg": [{"name": "reps_2_high", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}} ``` | Bits | Type | Reset | Name | Description | |:------:|:------:|:-------:|:------------|:---------------------------------------| | 31:0 | rw | 0x0 | reps_2_high | High number of repetitions dimension 2 |