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Functions

Name
void plp_mat_mult_cmplx_q32_parallel(const int32_t restrict pSrcA, const int32_t restrict pSrcB, uint32_t M, uint32_t N, uint32_t O, uint32_t shift, uint32_t nPE, int32_t *restrict pDstC)
Glue code of parallel matrix matrix multiplication for complex 32-bit fix-point.

Functions Documentation

function plp_mat_mult_cmplx_q32_parallel

void plp_mat_mult_cmplx_q32_parallel(
    const int32_t *__restrict__ pSrcA,
    const int32_t *__restrict__ pSrcB,
    uint32_t M,
    uint32_t N,
    uint32_t O,
    uint32_t shift,
    uint32_t nPE,
    int32_t *__restrict__ pDstC
)

Glue code of parallel matrix matrix multiplication for complex 32-bit fix-point.

Parameters:

  • pSrcA Points to the first input matrix of shape MxN
  • pSrcB Points to the second input matrix of shape NxO
  • M Height of matrix SrcA and DstC
  • N Width of matrix SrcA and height of matrix SrcB
  • O Width of matrix SrcB and DstC
  • shift Amount to shift the result of each multiplication ot the right
  • nPE Number of cores to use for computation
  • pDstC Points to the output matrix of shape MxO

Return: none

Par: Fix-Point

Fix-Point and Shifting The result will be shifted by the parameter shift to the right (which corresponds to a multiplication by 2^-shift). Assume that matrix A is represente as pSrcA * 2^-x and matrix B as pSrcB * 2^-y (which means that A has x, and B has y bits after the binary point). Then, the output matrix C is represented as pDstC * 2^-(x + y - shift). The output matrix is also stored with the same number of bits as the inputs. Set the shift parameter such that no overflow occurrs.

Source code

/* =====================================================================
 * Project:      PULP DSP Library
 * Title:        plp_mat_mult_cmplx_q32_parallel.c
 * Description:  parallel 16-bit fix-point complex matrix matrix multiplication glue code
 *
 * $Date:        17. July 2020
 * $Revision:    V0
 *
 * Target Processor: PULP cores
 * ===================================================================== */
/*
 * Copyright (C) 2020 ETH Zurich and Ubiversity of Bologna. All rights reserved.
 *
 * Author: Tibor Schneider, ETH Zurich
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the License); you may
 * not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#include "plp_math.h"

void plp_mat_mult_cmplx_q32_parallel(const int32_t *__restrict__ pSrcA,
                                     const int32_t *__restrict__ pSrcB,
                                     uint32_t M,
                                     uint32_t N,
                                     uint32_t O,
                                     uint32_t shift,
                                     uint32_t nPE,
                                     int32_t *__restrict__ pDstC) {

    if (hal_cluster_id() == ARCHI_FC_CID) {
        printf("parallel processing supported only for cluster side\n");
        return;
    } else {
        plp_mat_mult_cmplx_instance_q32 args = { .pSrcA = pSrcA,
                                                 .pSrcB = pSrcB,
                                                 .M = M,
                                                 .N = N,
                                                 .O = O,
                                                 .shift = shift,
                                                 .nPE = nPE,
                                                 .pDstC = pDstC };

        hal_cl_team_fork(nPE, plp_mat_mult_cmplx_q32p_xpulpv2, (void *)&args);
    }
}

Updated on 2023-03-01 at 16:16:33 +0000