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dma.h
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1// Copyright 2023 ETH Zurich and University of Bologna.
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4
5#ifndef SNRT_SUPPORTS_DMA
6#include <string.h>
7#endif
8
14#pragma once
15
16#include <math.h>
17
27inline uint32_t snrt_dma_start_1d(uint64_t dst, uint64_t src, size_t size,
28 uint32_t channel) {
29#ifdef SNRT_SUPPORTS_DMA
30 uint32_t dst_lo = dst & 0xFFFFFFFF;
31 uint32_t dst_hi = dst >> 32;
32 uint32_t src_lo = src & 0xFFFFFFFF;
33 uint32_t src_hi = src >> 32;
34 uint32_t cfg = (channel << 2) | 0b00;
35 uint32_t txid;
36
37 asm volatile(
38 "dmsrc %[src_lo], %[src_hi] \n"
39 "dmdst %[dst_lo], %[dst_hi] \n"
40 "dmcpy %[txid], %[size], %[cfg] \n"
41 : [ txid ] "=r"(txid)
42 : [ src_lo ] "r"(src_lo), [ src_hi ] "r"(src_hi),
43 [ dst_lo ] "r"(dst_lo), [ dst_hi ] "r"(dst_hi), [ size ] "r"(size),
44 [ cfg ] "r"(cfg));
45 return txid;
46#else
47 memcpy((void *)dst, (const void *)src, size);
48 return 0;
49#endif
50}
51
58inline uint32_t snrt_dma_start_1d(volatile void *dst, volatile void *src,
59 size_t size, uint32_t channel = 0) {
60 return snrt_dma_start_1d((uint64_t)dst, (uint64_t)src, size, channel);
61}
62
70inline void snrt_dma_set_awuser(uint64_t field) {
71#ifdef SNRT_SUPPORTS_DMA
72 uint32_t user_low = (uint32_t)(field);
73 uint32_t user_high = (uint32_t)(field >> 32);
74 asm volatile("dmuser %[user_low], %[user_high] \n"
75 :
76 : [ user_low ] "r"(user_low), [ user_high ] "r"(user_high));
77#endif
78}
79
87inline void snrt_dma_enable_multicast(uint64_t mask) {
89 op.f.opcode = SNRT_COLLECTIVE_MULTICAST;
90 op.f.mask = mask;
92}
93
102inline void snrt_dma_enable_reduction(uint64_t mask,
103 snrt_collective_opcode_t opcode) {
105 op.f.opcode = opcode;
106 op.f.mask = mask;
108}
109
115
121
130inline uint32_t snrt_dma_start_1d_reduction(uint64_t dst, uint64_t src,
131 size_t size, uint64_t mask,
132 snrt_collective_opcode_t opcode,
133 uint32_t channel = 0) {
134 snrt_dma_enable_reduction(mask, opcode);
135 uint32_t txid = snrt_dma_start_1d(dst, src, size, channel);
137 return txid;
138}
139
148inline uint32_t snrt_dma_start_1d_reduction(uint64_t dst, uint64_t src,
149 size_t size, snrt_comm_t comm,
150 snrt_collective_opcode_t opcode,
151 uint32_t channel = 0) {
152 uint64_t mask = snrt_get_collective_mask(comm);
153 uint32_t txid =
154 snrt_dma_start_1d_reduction(dst, src, size, mask, opcode, channel);
155 return txid;
156}
157
165inline uint32_t snrt_dma_start_1d_mcast(uint64_t dst, uint64_t src, size_t size,
166 uint64_t mask, uint32_t channel = 0) {
168 uint32_t txid = snrt_dma_start_1d(dst, src, size, channel);
170 return txid;
171}
172
180inline uint32_t snrt_dma_start_1d_mcast(uint64_t dst, uint64_t src, size_t size,
181 snrt_comm_t comm,
182 uint32_t channel = 0) {
183 uint64_t mask = snrt_get_collective_mask(comm);
184 uint32_t txid = snrt_dma_start_1d_mcast(dst, src, size, mask, channel);
185 return txid;
186}
187
196inline uint32_t snrt_dma_start_1d_reduction(volatile void *dst,
197 volatile void *src, size_t size,
198 uint64_t mask,
199 snrt_collective_opcode_t opcode,
200 uint32_t channel = 0) {
201 return snrt_dma_start_1d_reduction((uint64_t)dst, (uint64_t)src, size, mask,
202 opcode, channel);
203}
204
213inline uint32_t snrt_dma_start_1d_mcast(volatile void *dst, volatile void *src,
214 size_t size, uint64_t mask,
215 uint32_t channel = 0) {
216 return snrt_dma_start_1d_mcast((uint64_t)dst, (uint64_t)src, size, mask,
217 channel);
218}
219
233inline snrt_dma_txid_t snrt_dma_start_2d(uint64_t dst, uint64_t src,
234 size_t size, size_t dst_stride,
235 size_t src_stride, size_t repeat,
236 uint32_t channel) {
237#ifdef SNRT_SUPPORTS_DMA
238 uint32_t dst_lo = dst & 0xFFFFFFFF;
239 uint32_t dst_hi = dst >> 32;
240 uint32_t src_lo = src & 0xFFFFFFFF;
241 uint32_t src_hi = src >> 32;
242 uint32_t cfg = (channel << 2) | 0b10;
243 uint32_t txid;
244
245 asm volatile(
246 "dmsrc %[src_lo], %[src_hi] \n"
247 "dmdst %[dst_lo], %[dst_hi] \n"
248 "dmstr %[src_stride], %[dst_stride] \n"
249 "dmrep %[repeat] \n"
250 "dmcpy %[txid], %[size], %[cfg] \n"
251 : [ txid ] "=r"(txid)
252 : [ src_lo ] "r"(src_lo), [ src_hi ] "r"(src_hi),
253 [ dst_lo ] "r"(dst_lo), [ dst_hi ] "r"(dst_hi),
254 [ dst_stride ] "r"(dst_stride), [ src_stride ] "r"(src_stride),
255 [ repeat ] "r"(repeat), [ size ] "r"(size), [ cfg ] "r"(cfg));
256
257 return txid;
258#else
259 // TODO(colluca): we can implement this as a series of memcpy calls
260 return 0;
261#endif
262}
263
271inline uint32_t snrt_dma_start_2d(volatile void *dst, volatile void *src,
272 size_t size, size_t dst_stride,
273 size_t src_stride, size_t repeat,
274 uint32_t channel = 0) {
275 return snrt_dma_start_2d((uint64_t)dst, (uint64_t)src, size, dst_stride,
276 src_stride, repeat, channel);
277}
278
288inline uint32_t snrt_dma_start_2d_mcast(uint64_t dst, uint64_t src, size_t size,
289 size_t dst_stride, size_t src_stride,
290 size_t repeat, uint32_t mask,
291 uint32_t channel = 0) {
293 uint32_t txid = snrt_dma_start_2d(dst, src, size, dst_stride, src_stride,
294 repeat, channel);
296 return txid;
297}
298
307inline uint32_t snrt_dma_start_2d_mcast(volatile void *dst, volatile void *src,
308 size_t size, size_t dst_stride,
309 size_t src_stride, size_t repeat,
310 uint32_t mask, uint32_t channel = 0) {
311 return snrt_dma_start_2d_mcast((uint64_t)dst, (uint64_t)src, size,
312 dst_stride, src_stride, repeat, mask,
313 channel);
314}
315
325static inline uint32_t snrt_dma_busy(const uint32_t channel) {
326#ifdef SNRT_SUPPORTS_DMA
327 uint32_t busy;
328 asm volatile("dmstati %[busy], (%[channel] << 2) | 2 \n"
329 : [ busy ] "=r"(busy)
330 : [ channel ] "i"(channel)
331 :);
332 return busy;
333#else
334 return 0;
335#endif
336}
337
347static inline uint32_t snrt_dma_would_block(const uint32_t channel) {
348#ifdef SNRT_SUPPORTS_DMA
349 uint32_t would_block;
350 asm volatile("dmstati %[would_block], (%[channel] << 2) | 3 \n"
351 : [ would_block ] "=r"(would_block)
352 : [ channel ] "i"(channel)
353 :);
354 return would_block;
355#else
356 return 0;
357#endif
358}
359
370static inline void snrt_dma_wait(snrt_dma_txid_t txid,
371 const uint32_t channel = 0) {
372#ifdef SNRT_SUPPORTS_DMA
373 asm volatile(
374 "1: \n"
375 "dmstati t0, (%[channel] << 2) | 0 \n"
376 "bltu t0, %[txid], 1b \n"
377 :
378 : [ txid ] "r"(txid), [ channel ] "i"(channel)
379 : "t0");
380#endif
381}
382
392static inline void snrt_dma_wait_all(const uint32_t channel = 0) {
393#ifdef SNRT_SUPPORTS_DMA
394 while (snrt_dma_busy(channel))
395 ;
396#endif
397}
398
403inline void snrt_dma_wait_all_channels(uint32_t num_channels) {
404 for (int c = 0; c < num_channels; c++) {
406 }
407}
408
416#ifdef SNRT_SUPPORTS_DMA
417 asm volatile("dmstati zero, 0 \n");
418#endif
419}
420
428#ifdef SNRT_SUPPORTS_DMA
429 asm volatile("dmstati zero, 0 \n");
430#endif
431}
432
440inline void snrt_dma_memset(void *ptr, uint8_t value, uint32_t len) {
441#ifdef SNRT_SUPPORTS_DMA
442 // We set the first 64 bytes to the value, and then we use the DMA to copy
443 // these into the remaining memory region. DMA is used only if len is
444 // larger than 64 bytes, and an integer multiple of 64 bytes.
445 size_t n_1d_transfers = len / 64;
446 size_t use_dma = (len % 64) == 0 && len > 64;
447 uint8_t *p = (uint8_t *)ptr;
448
449 uint32_t nbytes = len < 64 || !use_dma ? len : 64;
450 while (nbytes--) {
451 *p++ = value;
452 }
453
454 if (use_dma) {
455 snrt_dma_start_2d(ptr, ptr, 64, 64, 0, n_1d_transfers);
457 }
458#else
459 memset(ptr, (int)value, len);
460#endif
461}
462
471inline snrt_dma_txid_t snrt_dma_load_1d_tile(volatile void *dst,
472 volatile void *src,
473 size_t tile_idx, size_t tile_size,
474 uint32_t prec) {
475 size_t tile_nbytes = tile_size * prec;
476 return snrt_dma_start_1d(
477 (uint64_t)dst, (uint64_t)src + tile_idx * tile_nbytes, tile_nbytes);
478}
479
489inline snrt_dma_txid_t snrt_dma_load_1d_tile_mcast(void *dst, void *src,
490 size_t tile_idx,
491 size_t tile_size,
492 uint32_t prec,
493 uint64_t mask) {
494 size_t tile_nbytes = tile_size * prec;
495 return snrt_dma_start_1d_mcast((uintptr_t)dst,
496 (uintptr_t)src + tile_idx * tile_nbytes,
497 tile_nbytes, mask);
498}
499
510inline snrt_dma_txid_t snrt_dma_reduction_load_1d_tile(
511 void *dst, void *src, size_t tile_idx, size_t tile_size, uint32_t prec,
512 uint64_t mask, snrt_collective_opcode_t opcode) {
513 size_t tile_nbytes = tile_size * prec;
514 return snrt_dma_start_1d_reduction((uintptr_t)dst,
515 (uintptr_t)src + tile_idx * tile_nbytes,
516 tile_nbytes, mask, opcode);
517}
518
527inline snrt_dma_txid_t snrt_dma_1d_to_2d(volatile void *dst, volatile void *src,
528 size_t size, size_t row_size,
529 size_t stride) {
530 return snrt_dma_start_2d(dst, src, row_size, stride, row_size,
531 size / row_size);
532}
533
542inline snrt_dma_txid_t snrt_dma_2d_to_1d(volatile void *dst, volatile void *src,
543 size_t size, size_t row_size,
544 size_t stride) {
545 return snrt_dma_start_2d(dst, src, row_size, row_size, stride,
546 size / row_size);
547}
548
557inline snrt_dma_txid_t snrt_dma_store_1d_tile(void *dst, void *src,
558 size_t tile_idx, size_t tile_size,
559 uint32_t prec) {
560 size_t tile_nbytes = tile_size * prec;
561 return snrt_dma_start_1d((uint64_t)dst + tile_idx * tile_nbytes,
562 (uint64_t)src, tile_nbytes);
563}
564
580inline snrt_dma_txid_t snrt_dma_load_2d_tile(
581 void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx,
582 size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size,
583 uint32_t prec, size_t tile_ld) {
584 size_t src_offset = 0;
585 // Advance src array in x0 and x1 dimensions, and convert to byte offset
586 src_offset += tile_x0_idx * tile_x0_size;
587 src_offset += tile_x1_idx * tile_x1_size * full_x0_size;
588 src_offset *= prec;
589 // Initiate transfer
590 return snrt_dma_start_2d((uint64_t)dst, // dst
591 (uint64_t)src + src_offset, // src
592 tile_x0_size * prec, // size
593 tile_ld, // dst_stride
594 full_x0_size * prec, // src_stride
595 tile_x1_size // repeat
596 );
597}
598
608inline snrt_dma_txid_t snrt_dma_load_2d_tile(
609 void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx,
610 size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size,
611 uint32_t prec) {
612 return snrt_dma_load_2d_tile(dst, src, tile_x1_idx, tile_x0_idx,
613 tile_x1_size, tile_x0_size, full_x0_size, prec,
614 tile_x0_size * prec);
615}
616
624inline snrt_dma_txid_t snrt_dma_load_2d_tile_mcast(
625 void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx,
626 size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size,
627 uint32_t prec, size_t tile_ld, uint32_t mask) {
628 size_t src_offset = 0;
629 // Advance src array in x0 and x1 dimensions, and convert to byte offset
630 src_offset += tile_x0_idx * tile_x0_size;
631 src_offset += tile_x1_idx * tile_x1_size * full_x0_size;
632 src_offset *= prec;
633 // Initiate transfer
634 return snrt_dma_start_2d_mcast((uint64_t)dst, // dst
635 (uint64_t)src + src_offset, // src
636 tile_x0_size * prec, // size
637 tile_ld, // dst_stride
638 full_x0_size * prec, // src_stride
639 tile_x1_size, // repeat
640 mask // mask
641 );
642}
643
653inline snrt_dma_txid_t snrt_dma_load_2d_tile_mcast(
654 void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx,
655 size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size,
656 uint32_t prec, uint32_t mask) {
657 return snrt_dma_load_2d_tile_mcast(dst, src, tile_x1_idx, tile_x0_idx,
658 tile_x1_size, tile_x0_size, full_x0_size,
659 prec, tile_x0_size * prec, mask);
660}
661
672inline snrt_dma_txid_t snrt_dma_load_2d_tile_mcast(
673 void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx,
674 size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size,
675 uint32_t prec, snrt_comm_t comm) {
676 uint64_t mask = snrt_get_collective_mask(comm);
677 return snrt_dma_load_2d_tile_mcast(dst, src, tile_x1_idx, tile_x0_idx,
678 tile_x1_size, tile_x0_size, full_x0_size,
679 prec, mask);
680}
681
698inline snrt_dma_txid_t snrt_dma_load_2d_tile_in_banks(
699 void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx,
700 size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size,
701 uint32_t prec, size_t num_banks) {
702 // Calculate new tile size after reshaping the tile in the selected banks
703 size_t tile_x0_size_in_banks = (num_banks * SNRT_TCDM_BANK_WIDTH) / prec;
704 size_t tile_x1_size_in_banks =
705 ceil((tile_x1_size * tile_x0_size) / (double)tile_x0_size_in_banks);
706 size_t tile_ld = SNRT_TCDM_HYPERBANK_WIDTH;
707 return snrt_dma_load_2d_tile(dst, src, tile_x1_idx, tile_x0_idx,
708 tile_x1_size_in_banks, tile_x0_size_in_banks,
709 full_x0_size, prec, tile_ld);
710}
711
727inline snrt_dma_txid_t snrt_dma_store_2d_tile(
728 void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx,
729 size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size,
730 uint32_t prec, size_t tile_ld) {
731 size_t dst_offset = 0;
732 // Advance dst array in x0 and x1 dimensions, and convert to byte offset
733 dst_offset += tile_x0_idx * tile_x0_size;
734 dst_offset += tile_x1_idx * tile_x1_size * full_x0_size;
735 dst_offset *= prec;
736 // Initiate transfer
737 return snrt_dma_start_2d((uint64_t)dst + dst_offset, // dst
738 (uint64_t)src, // src
739 tile_x0_size * prec, // size
740 full_x0_size * prec, // dst_stride
741 tile_ld, // src_stride
742 tile_x1_size // repeat
743 );
744}
745
755inline snrt_dma_txid_t snrt_dma_store_2d_tile(
756 void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx,
757 size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size,
758 uint32_t prec) {
759 return snrt_dma_store_2d_tile(dst, src, tile_x1_idx, tile_x0_idx,
760 tile_x1_size, tile_x0_size, full_x0_size,
761 prec, tile_x0_size * prec);
762}
763
781 void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx,
782 size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size,
783 uint32_t prec, size_t num_banks) {
784 // Calculate new tile size after reshaping the tile in the selected banks
785 size_t tile_x0_size_in_banks = (num_banks * SNRT_TCDM_BANK_WIDTH) / prec;
786 size_t tile_x1_size_in_banks =
787 ceil((tile_x1_size * tile_x0_size) / (double)tile_x0_size_in_banks);
788 size_t tile_ld = SNRT_TCDM_HYPERBANK_WIDTH;
789 return snrt_dma_store_2d_tile(dst, src, tile_x1_idx, tile_x0_idx,
790 tile_x1_size_in_banks, tile_x0_size_in_banks,
791 full_x0_size, prec, tile_ld);
792}
void snrt_dma_disable_reduction()
Disable reduction operations for successive transfers.
Definition dma.h:120
void snrt_dma_set_awuser(uint64_t field)
Set AW user field of the DMA's AXI interface.
Definition dma.h:70
snrt_dma_txid_t snrt_dma_load_1d_tile_mcast(void *dst, void *src, size_t tile_idx, size_t tile_size, uint32_t prec, uint64_t mask)
Load a tile of a 1D array.
Definition dma.h:489
snrt_dma_txid_t snrt_dma_start_2d(uint64_t dst, uint64_t src, size_t size, size_t dst_stride, size_t src_stride, size_t repeat, uint32_t channel)
Start an asynchronous 2D DMA transfer with 64-bit wide pointers.
Definition dma.h:233
void snrt_dma_disable_multicast()
Disable multicast for successive transfers.
Definition dma.h:114
snrt_dma_txid_t snrt_dma_load_1d_tile(volatile void *dst, volatile void *src, size_t tile_idx, size_t tile_size, uint32_t prec)
Load a tile of a 1D array.
Definition dma.h:471
snrt_dma_txid_t snrt_dma_1d_to_2d(volatile void *dst, volatile void *src, size_t size, size_t row_size, size_t stride)
Transfer and reshape a 1D array into a 2D array.
Definition dma.h:527
static uint32_t snrt_dma_would_block(const uint32_t channel)
Read DMA would_block flag.
Definition dma.h:347
snrt_dma_txid_t snrt_dma_store_2d_tile_from_banks(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t num_banks)
Store a 2D tile of a 2D array from a 1D layout occupying a subset of TCDM banks.
Definition dma.h:780
uint32_t snrt_dma_start_1d_mcast(uint64_t dst, uint64_t src, size_t size, uint64_t mask, uint32_t channel=0)
Start an asynchronous multicast 1D DMA transfer with 64-bit wide pointers.
Definition dma.h:165
uint32_t snrt_dma_start_1d(uint64_t dst, uint64_t src, size_t size, uint32_t channel)
Start an asynchronous 1D DMA transfer with 64-bit wide pointers on a specific DMA channel.
Definition dma.h:27
uint32_t snrt_dma_start_2d_mcast(uint64_t dst, uint64_t src, size_t size, size_t dst_stride, size_t src_stride, size_t repeat, uint32_t mask, uint32_t channel=0)
Start an asynchronous, multicast 2D DMA transfer with 64-bit wide pointers.
Definition dma.h:288
snrt_dma_txid_t snrt_dma_store_2d_tile(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t tile_ld)
Store a 2D tile to a 2D array.
Definition dma.h:727
snrt_dma_txid_t snrt_dma_load_2d_tile_in_banks(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t num_banks)
Load a 2D tile of a 2D array and reshape it to occupy a subset of TCDM banks.
Definition dma.h:698
snrt_dma_txid_t snrt_dma_store_1d_tile(void *dst, void *src, size_t tile_idx, size_t tile_size, uint32_t prec)
Store a tile to a 1D array.
Definition dma.h:557
uint32_t snrt_dma_start_1d_reduction(uint64_t dst, uint64_t src, size_t size, uint64_t mask, snrt_collective_opcode_t opcode, uint32_t channel=0)
Start an asynchronous reduction 1D DMA transfer with 64-bit wide pointers.
Definition dma.h:130
snrt_dma_txid_t snrt_dma_2d_to_1d(volatile void *dst, volatile void *src, size_t size, size_t row_size, size_t stride)
Transfer and reshape a 2D array into a 1D array.
Definition dma.h:542
void snrt_dma_enable_reduction(uint64_t mask, snrt_collective_opcode_t opcode)
Enable reduction operations for successive transfers.
Definition dma.h:102
void snrt_dma_wait_all_channels(uint32_t num_channels)
Block until the first num_channels channels are idle.
Definition dma.h:403
snrt_dma_txid_t snrt_dma_reduction_load_1d_tile(void *dst, void *src, size_t tile_idx, size_t tile_size, uint32_t prec, uint64_t mask, snrt_collective_opcode_t opcode)
Load a tile of a 1D array.
Definition dma.h:510
void snrt_dma_memset(void *ptr, uint8_t value, uint32_t len)
Fast memset function performed by DMA.
Definition dma.h:440
void snrt_dma_enable_multicast(uint64_t mask)
Enable multicast for successive transfers.
Definition dma.h:87
static void snrt_dma_wait(snrt_dma_txid_t txid, const uint32_t channel=0)
Block until a DMA transfer finishes on a specific DMA channel.
Definition dma.h:370
snrt_dma_txid_t snrt_dma_load_2d_tile(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t tile_ld)
Load a 2D tile of a 2D array.
Definition dma.h:580
static uint32_t snrt_dma_busy(const uint32_t channel)
Read DMA busy flag.
Definition dma.h:325
static void snrt_dma_wait_all(const uint32_t channel=0)
Block until a specific DMA channel is idle.
Definition dma.h:392
void snrt_dma_start_tracking()
Start tracking of dma performance region. Does not have any implications on the HW....
Definition dma.h:415
snrt_dma_txid_t snrt_dma_load_2d_tile_mcast(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t tile_ld, uint32_t mask)
Load a 2D tile of a 2D array using multicast.
Definition dma.h:624
void snrt_dma_stop_tracking()
Stop tracking of dma performance region. Does not have any implications on the HW....
Definition dma.h:427
Definition sync_decls.h:14
Definition sync_decls.h:40