5#ifndef SNRT_SUPPORTS_DMA
29#ifdef SNRT_SUPPORTS_DMA
30 uint32_t dst_lo = dst & 0xFFFFFFFF;
31 uint32_t dst_hi = dst >> 32;
32 uint32_t src_lo = src & 0xFFFFFFFF;
33 uint32_t src_hi = src >> 32;
34 uint32_t cfg = (channel << 2) | 0b00;
38 "dmsrc %[src_lo], %[src_hi] \n"
39 "dmdst %[dst_lo], %[dst_hi] \n"
40 "dmcpy %[txid], %[size], %[cfg] \n"
42 : [ src_lo ]
"r"(src_lo), [ src_hi ]
"r"(src_hi),
43 [ dst_lo ]
"r"(dst_lo), [ dst_hi ]
"r"(dst_hi), [ size ]
"r"(size),
47 memcpy((
void *)dst, (
const void *)src, size);
59 size_t size, uint32_t channel = 0) {
71#ifdef SNRT_SUPPORTS_DMA
72 uint32_t user_low = (uint32_t)(field);
73 uint32_t user_high = (uint32_t)(field >> 32);
74 asm volatile(
"dmuser %[user_low], %[user_high] \n"
76 : [ user_low ]
"r"(user_low), [ user_high ]
"r"(user_high));
89 op.f.opcode = SNRT_COLLECTIVE_MULTICAST;
103 snrt_collective_opcode_t opcode) {
105 op.f.opcode = opcode;
131 size_t size, uint64_t mask,
132 snrt_collective_opcode_t opcode,
133 uint32_t channel = 0) {
150 snrt_collective_opcode_t opcode,
151 uint32_t channel = 0) {
152 uint64_t mask = snrt_get_collective_mask(comm);
166 uint64_t mask, uint32_t channel = 0) {
182 uint32_t channel = 0) {
183 uint64_t mask = snrt_get_collective_mask(comm);
197 volatile void *src,
size_t size,
199 snrt_collective_opcode_t opcode,
200 uint32_t channel = 0) {
214 size_t size, uint64_t mask,
215 uint32_t channel = 0) {
234 size_t size,
size_t dst_stride,
235 size_t src_stride,
size_t repeat,
237#ifdef SNRT_SUPPORTS_DMA
238 uint32_t dst_lo = dst & 0xFFFFFFFF;
239 uint32_t dst_hi = dst >> 32;
240 uint32_t src_lo = src & 0xFFFFFFFF;
241 uint32_t src_hi = src >> 32;
242 uint32_t cfg = (channel << 2) | 0b10;
246 "dmsrc %[src_lo], %[src_hi] \n"
247 "dmdst %[dst_lo], %[dst_hi] \n"
248 "dmstr %[src_stride], %[dst_stride] \n"
250 "dmcpy %[txid], %[size], %[cfg] \n"
251 : [ txid ]
"=r"(txid)
252 : [ src_lo ]
"r"(src_lo), [ src_hi ]
"r"(src_hi),
253 [ dst_lo ]
"r"(dst_lo), [ dst_hi ]
"r"(dst_hi),
254 [ dst_stride ]
"r"(dst_stride), [ src_stride ]
"r"(src_stride),
255 [ repeat ]
"r"(repeat), [ size ]
"r"(size), [ cfg ]
"r"(cfg));
272 size_t size,
size_t dst_stride,
273 size_t src_stride,
size_t repeat,
274 uint32_t channel = 0) {
276 src_stride, repeat, channel);
289 size_t dst_stride,
size_t src_stride,
290 size_t repeat, uint32_t mask,
291 uint32_t channel = 0) {
308 size_t size,
size_t dst_stride,
309 size_t src_stride,
size_t repeat,
310 uint32_t mask, uint32_t channel = 0) {
312 dst_stride, src_stride, repeat, mask,
326#ifdef SNRT_SUPPORTS_DMA
328 asm volatile(
"dmstati %[busy], (%[channel] << 2) | 2 \n"
329 : [ busy ]
"=r"(busy)
330 : [ channel ]
"i"(channel)
348#ifdef SNRT_SUPPORTS_DMA
349 uint32_t would_block;
350 asm volatile(
"dmstati %[would_block], (%[channel] << 2) | 3 \n"
351 : [ would_block ]
"=r"(would_block)
352 : [ channel ]
"i"(channel)
371 const uint32_t channel = 0) {
372#ifdef SNRT_SUPPORTS_DMA
375 "dmstati t0, (%[channel] << 2) | 0 \n"
376 "bltu t0, %[txid], 1b \n"
378 : [ txid ]
"r"(txid), [ channel ]
"i"(channel)
393#ifdef SNRT_SUPPORTS_DMA
404 for (
int c = 0; c < num_channels; c++) {
416#ifdef SNRT_SUPPORTS_DMA
417 asm volatile(
"dmstati zero, 0 \n");
428#ifdef SNRT_SUPPORTS_DMA
429 asm volatile(
"dmstati zero, 0 \n");
441#ifdef SNRT_SUPPORTS_DMA
445 size_t n_1d_transfers = len / 64;
446 size_t use_dma = (len % 64) == 0 && len > 64;
447 uint8_t *p = (uint8_t *)ptr;
449 uint32_t nbytes = len < 64 || !use_dma ? len : 64;
459 memset(ptr, (
int)value, len);
473 size_t tile_idx,
size_t tile_size,
475 size_t tile_nbytes = tile_size * prec;
477 (uint64_t)dst, (uint64_t)src + tile_idx * tile_nbytes, tile_nbytes);
494 size_t tile_nbytes = tile_size * prec;
496 (uintptr_t)src + tile_idx * tile_nbytes,
511 void *dst,
void *src,
size_t tile_idx,
size_t tile_size, uint32_t prec,
512 uint64_t mask, snrt_collective_opcode_t opcode) {
513 size_t tile_nbytes = tile_size * prec;
515 (uintptr_t)src + tile_idx * tile_nbytes,
516 tile_nbytes, mask, opcode);
528 size_t size,
size_t row_size,
543 size_t size,
size_t row_size,
558 size_t tile_idx,
size_t tile_size,
560 size_t tile_nbytes = tile_size * prec;
562 (uint64_t)src, tile_nbytes);
581 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
582 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
583 uint32_t prec,
size_t tile_ld) {
584 size_t src_offset = 0;
586 src_offset += tile_x0_idx * tile_x0_size;
587 src_offset += tile_x1_idx * tile_x1_size * full_x0_size;
591 (uint64_t)src + src_offset,
609 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
610 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
613 tile_x1_size, tile_x0_size, full_x0_size, prec,
614 tile_x0_size * prec);
625 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
626 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
627 uint32_t prec,
size_t tile_ld, uint32_t mask) {
628 size_t src_offset = 0;
630 src_offset += tile_x0_idx * tile_x0_size;
631 src_offset += tile_x1_idx * tile_x1_size * full_x0_size;
635 (uint64_t)src + src_offset,
654 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
655 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
656 uint32_t prec, uint32_t mask) {
658 tile_x1_size, tile_x0_size, full_x0_size,
659 prec, tile_x0_size * prec, mask);
673 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
674 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
676 uint64_t mask = snrt_get_collective_mask(comm);
678 tile_x1_size, tile_x0_size, full_x0_size,
699 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
700 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
701 uint32_t prec,
size_t num_banks) {
703 size_t tile_x0_size_in_banks = (num_banks * SNRT_TCDM_BANK_WIDTH) / prec;
704 size_t tile_x1_size_in_banks =
705 ceil((tile_x1_size * tile_x0_size) / (
double)tile_x0_size_in_banks);
706 size_t tile_ld = SNRT_TCDM_HYPERBANK_WIDTH;
708 tile_x1_size_in_banks, tile_x0_size_in_banks,
709 full_x0_size, prec, tile_ld);
728 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
729 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
730 uint32_t prec,
size_t tile_ld) {
731 size_t dst_offset = 0;
733 dst_offset += tile_x0_idx * tile_x0_size;
734 dst_offset += tile_x1_idx * tile_x1_size * full_x0_size;
756 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
757 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
760 tile_x1_size, tile_x0_size, full_x0_size,
761 prec, tile_x0_size * prec);
781 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
782 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
783 uint32_t prec,
size_t num_banks) {
785 size_t tile_x0_size_in_banks = (num_banks * SNRT_TCDM_BANK_WIDTH) / prec;
786 size_t tile_x1_size_in_banks =
787 ceil((tile_x1_size * tile_x0_size) / (
double)tile_x0_size_in_banks);
788 size_t tile_ld = SNRT_TCDM_HYPERBANK_WIDTH;
790 tile_x1_size_in_banks, tile_x0_size_in_banks,
791 full_x0_size, prec, tile_ld);
void snrt_dma_disable_reduction()
Disable reduction operations for successive transfers.
Definition dma.h:120
void snrt_dma_set_awuser(uint64_t field)
Set AW user field of the DMA's AXI interface.
Definition dma.h:70
snrt_dma_txid_t snrt_dma_load_1d_tile_mcast(void *dst, void *src, size_t tile_idx, size_t tile_size, uint32_t prec, uint64_t mask)
Load a tile of a 1D array.
Definition dma.h:489
snrt_dma_txid_t snrt_dma_start_2d(uint64_t dst, uint64_t src, size_t size, size_t dst_stride, size_t src_stride, size_t repeat, uint32_t channel)
Start an asynchronous 2D DMA transfer with 64-bit wide pointers.
Definition dma.h:233
void snrt_dma_disable_multicast()
Disable multicast for successive transfers.
Definition dma.h:114
snrt_dma_txid_t snrt_dma_load_1d_tile(volatile void *dst, volatile void *src, size_t tile_idx, size_t tile_size, uint32_t prec)
Load a tile of a 1D array.
Definition dma.h:471
snrt_dma_txid_t snrt_dma_1d_to_2d(volatile void *dst, volatile void *src, size_t size, size_t row_size, size_t stride)
Transfer and reshape a 1D array into a 2D array.
Definition dma.h:527
static uint32_t snrt_dma_would_block(const uint32_t channel)
Read DMA would_block flag.
Definition dma.h:347
snrt_dma_txid_t snrt_dma_store_2d_tile_from_banks(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t num_banks)
Store a 2D tile of a 2D array from a 1D layout occupying a subset of TCDM banks.
Definition dma.h:780
uint32_t snrt_dma_start_1d_mcast(uint64_t dst, uint64_t src, size_t size, uint64_t mask, uint32_t channel=0)
Start an asynchronous multicast 1D DMA transfer with 64-bit wide pointers.
Definition dma.h:165
uint32_t snrt_dma_start_1d(uint64_t dst, uint64_t src, size_t size, uint32_t channel)
Start an asynchronous 1D DMA transfer with 64-bit wide pointers on a specific DMA channel.
Definition dma.h:27
uint32_t snrt_dma_start_2d_mcast(uint64_t dst, uint64_t src, size_t size, size_t dst_stride, size_t src_stride, size_t repeat, uint32_t mask, uint32_t channel=0)
Start an asynchronous, multicast 2D DMA transfer with 64-bit wide pointers.
Definition dma.h:288
snrt_dma_txid_t snrt_dma_store_2d_tile(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t tile_ld)
Store a 2D tile to a 2D array.
Definition dma.h:727
snrt_dma_txid_t snrt_dma_load_2d_tile_in_banks(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t num_banks)
Load a 2D tile of a 2D array and reshape it to occupy a subset of TCDM banks.
Definition dma.h:698
snrt_dma_txid_t snrt_dma_store_1d_tile(void *dst, void *src, size_t tile_idx, size_t tile_size, uint32_t prec)
Store a tile to a 1D array.
Definition dma.h:557
uint32_t snrt_dma_start_1d_reduction(uint64_t dst, uint64_t src, size_t size, uint64_t mask, snrt_collective_opcode_t opcode, uint32_t channel=0)
Start an asynchronous reduction 1D DMA transfer with 64-bit wide pointers.
Definition dma.h:130
snrt_dma_txid_t snrt_dma_2d_to_1d(volatile void *dst, volatile void *src, size_t size, size_t row_size, size_t stride)
Transfer and reshape a 2D array into a 1D array.
Definition dma.h:542
void snrt_dma_enable_reduction(uint64_t mask, snrt_collective_opcode_t opcode)
Enable reduction operations for successive transfers.
Definition dma.h:102
void snrt_dma_wait_all_channels(uint32_t num_channels)
Block until the first num_channels channels are idle.
Definition dma.h:403
snrt_dma_txid_t snrt_dma_reduction_load_1d_tile(void *dst, void *src, size_t tile_idx, size_t tile_size, uint32_t prec, uint64_t mask, snrt_collective_opcode_t opcode)
Load a tile of a 1D array.
Definition dma.h:510
void snrt_dma_memset(void *ptr, uint8_t value, uint32_t len)
Fast memset function performed by DMA.
Definition dma.h:440
void snrt_dma_enable_multicast(uint64_t mask)
Enable multicast for successive transfers.
Definition dma.h:87
static void snrt_dma_wait(snrt_dma_txid_t txid, const uint32_t channel=0)
Block until a DMA transfer finishes on a specific DMA channel.
Definition dma.h:370
snrt_dma_txid_t snrt_dma_load_2d_tile(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t tile_ld)
Load a 2D tile of a 2D array.
Definition dma.h:580
static uint32_t snrt_dma_busy(const uint32_t channel)
Read DMA busy flag.
Definition dma.h:325
static void snrt_dma_wait_all(const uint32_t channel=0)
Block until a specific DMA channel is idle.
Definition dma.h:392
void snrt_dma_start_tracking()
Start tracking of dma performance region. Does not have any implications on the HW....
Definition dma.h:415
snrt_dma_txid_t snrt_dma_load_2d_tile_mcast(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t tile_ld, uint32_t mask)
Load a 2D tile of a 2D array using multicast.
Definition dma.h:624
void snrt_dma_stop_tracking()
Stop tracking of dma performance region. Does not have any implications on the HW....
Definition dma.h:427
Definition sync_decls.h:14
Definition sync_decls.h:40