5#ifndef SNRT_SUPPORTS_DMA
37 const uint32_t channel = 0) {
38#ifdef SNRT_SUPPORTS_DMA
39 uint32_t dst_lo = dst & 0xFFFFFFFF;
40 uint32_t dst_hi = dst >> 32;
41 uint32_t src_lo = src & 0xFFFFFFFF;
42 uint32_t src_hi = src >> 32;
46 "dmsrc %[src_lo], %[src_hi] \n"
47 "dmdst %[dst_lo], %[dst_hi] \n"
48 "dmcpyi %[txid], %[size], (%[channel] << 2) | 0b00 \n"
50 : [ src_lo ]
"r"(src_lo), [ src_hi ]
"r"(src_hi),
51 [ dst_lo ]
"r"(dst_lo), [ dst_hi ]
"r"(dst_hi), [ size ]
"r"(size),
52 [ channel ]
"i"(channel));
56 memcpy((
void *)dst, (
const void *)src, size);
69 const uint32_t channel = 0) {
81#ifdef SNRT_SUPPORTS_DMA
82 uint32_t user_low = (uint32_t)(field);
83 uint32_t user_high = (uint32_t)(field >> 32);
84 asm volatile(
"dmuser %[user_low], %[user_high] \n"
86 : [ user_low ]
"r"(user_low), [ user_high ]
"r"(user_high));
99 op.f.opcode = SNRT_COLLECTIVE_MULTICAST;
113 snrt_collective_opcode_t opcode) {
115 op.f.opcode = opcode;
141 uint64_t dst, uint64_t src,
size_t size, uint64_t mask,
142 snrt_collective_opcode_t opcode,
const uint32_t channel = 0) {
158 uint64_t dst, uint64_t src,
size_t size,
snrt_comm_t comm,
159 snrt_collective_opcode_t opcode,
const uint32_t channel = 0) {
160 uint64_t mask = snrt_get_collective_mask(comm);
174 size_t size, uint64_t mask,
175 const uint32_t channel = 0) {
191 const uint32_t channel = 0) {
192 uint64_t mask = snrt_get_collective_mask(comm);
206 volatile void *dst,
volatile void *src,
size_t size, uint64_t mask,
207 snrt_collective_opcode_t opcode,
const uint32_t channel = 0) {
221 volatile void *src,
size_t size,
223 const uint32_t channel = 0) {
247 size_t size,
size_t dst_stride,
250 const uint32_t channel = 0) {
251#ifdef SNRT_SUPPORTS_DMA
252 uint32_t dst_lo = dst & 0xFFFFFFFF;
253 uint32_t dst_hi = dst >> 32;
254 uint32_t src_lo = src & 0xFFFFFFFF;
255 uint32_t src_hi = src >> 32;
259 "dmsrc %[src_lo], %[src_hi] \n"
260 "dmdst %[dst_lo], %[dst_hi] \n"
261 "dmstr %[src_stride], %[dst_stride] \n"
263 "dmcpyi %[txid], %[size], (%[channel] << 2) | 0b10 \n"
264 : [ txid ]
"=r"(txid)
265 : [ src_lo ]
"r"(src_lo), [ src_hi ]
"r"(src_hi),
266 [ dst_lo ]
"r"(dst_lo), [ dst_hi ]
"r"(dst_hi),
267 [ dst_stride ]
"r"(dst_stride), [ src_stride ]
"r"(src_stride),
268 [ repeat ]
"r"(repeat), [ size ]
"r"(size), [ channel ]
"i"(channel));
285 size_t size,
size_t dst_stride,
286 size_t src_stride,
size_t repeat,
287 const uint32_t channel = 0) {
289 src_stride, repeat, channel);
302 size_t size,
size_t dst_stride,
303 size_t src_stride,
size_t repeat,
305 const uint32_t channel = 0) {
322 volatile void *src,
size_t size,
324 size_t src_stride,
size_t repeat,
326 const uint32_t channel = 0) {
328 dst_stride, src_stride, repeat, mask,
343 const uint32_t channel = 0) {
344#ifdef SNRT_SUPPORTS_DMA
347 "dmstati t0, (%[channel] << 2) | 0 \n"
348 "bltu t0, %[txid], 1b \n"
350 : [ txid ]
"r"(txid), [ channel ]
"i"(channel)
365#ifdef SNRT_SUPPORTS_DMA
369 "dmstati %[busy], (%[channel] << 2) | 2 \n"
370 "bne %[busy], zero, 1b \n"
371 : [ busy ]
"=r"(busy)
372 : [ channel ]
"i"(channel));
381 for (
int c = 0; c < num_channels; c++) {
393#ifdef SNRT_SUPPORTS_DMA
394 asm volatile(
"dmstati zero, 0 \n");
405#ifdef SNRT_SUPPORTS_DMA
406 asm volatile(
"dmstati zero, 0 \n");
418#ifdef SNRT_SUPPORTS_DMA
422 size_t n_1d_transfers = len / 64;
423 size_t use_dma = (len % 64) == 0 && len > 64;
424 uint8_t *p = (uint8_t *)ptr;
426 uint32_t nbytes = len < 64 || !use_dma ? len : 64;
436 memset(ptr, (
int)value, len);
450 size_t tile_idx,
size_t tile_size,
452 size_t tile_nbytes = tile_size * prec;
454 (uint64_t)dst, (uint64_t)src + tile_idx * tile_nbytes, tile_nbytes);
471 size_t tile_nbytes = tile_size * prec;
473 (uintptr_t)src + tile_idx * tile_nbytes,
488 void *dst,
void *src,
size_t tile_idx,
size_t tile_size, uint32_t prec,
489 uint64_t mask, snrt_collective_opcode_t opcode) {
490 size_t tile_nbytes = tile_size * prec;
492 (uintptr_t)src + tile_idx * tile_nbytes,
493 tile_nbytes, mask, opcode);
505 size_t size,
size_t row_size,
520 size_t size,
size_t row_size,
535 size_t tile_idx,
size_t tile_size,
537 size_t tile_nbytes = tile_size * prec;
539 (uint64_t)src, tile_nbytes);
558 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
559 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
560 uint32_t prec,
size_t tile_ld) {
561 size_t src_offset = 0;
563 src_offset += tile_x0_idx * tile_x0_size;
564 src_offset += tile_x1_idx * tile_x1_size * full_x0_size;
568 (uint64_t)src + src_offset,
586 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
587 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
590 tile_x1_size, tile_x0_size, full_x0_size, prec,
591 tile_x0_size * prec);
602 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
603 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
604 uint32_t prec,
size_t tile_ld, uint32_t mask) {
605 size_t src_offset = 0;
607 src_offset += tile_x0_idx * tile_x0_size;
608 src_offset += tile_x1_idx * tile_x1_size * full_x0_size;
612 (uint64_t)src + src_offset,
631 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
632 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
633 uint32_t prec, uint32_t mask) {
635 tile_x1_size, tile_x0_size, full_x0_size,
636 prec, tile_x0_size * prec, mask);
650 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
651 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
653 uint64_t mask = snrt_get_collective_mask(comm);
655 tile_x1_size, tile_x0_size, full_x0_size,
676 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
677 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
678 uint32_t prec,
size_t num_banks) {
680 size_t tile_x0_size_in_banks = (num_banks * SNRT_TCDM_BANK_WIDTH) / prec;
681 size_t tile_x1_size_in_banks =
682 ceil((tile_x1_size * tile_x0_size) / (
double)tile_x0_size_in_banks);
683 size_t tile_ld = SNRT_TCDM_HYPERBANK_WIDTH;
685 tile_x1_size_in_banks, tile_x0_size_in_banks,
686 full_x0_size, prec, tile_ld);
705 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
706 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
707 uint32_t prec,
size_t tile_ld) {
708 size_t dst_offset = 0;
710 dst_offset += tile_x0_idx * tile_x0_size;
711 dst_offset += tile_x1_idx * tile_x1_size * full_x0_size;
733 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
734 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
737 tile_x1_size, tile_x0_size, full_x0_size,
738 prec, tile_x0_size * prec);
758 void *dst,
void *src,
size_t tile_x1_idx,
size_t tile_x0_idx,
759 size_t tile_x1_size,
size_t tile_x0_size,
size_t full_x0_size,
760 uint32_t prec,
size_t num_banks) {
762 size_t tile_x0_size_in_banks = (num_banks * SNRT_TCDM_BANK_WIDTH) / prec;
763 size_t tile_x1_size_in_banks =
764 ceil((tile_x1_size * tile_x0_size) / (
double)tile_x0_size_in_banks);
765 size_t tile_ld = SNRT_TCDM_HYPERBANK_WIDTH;
767 tile_x1_size_in_banks, tile_x0_size_in_banks,
768 full_x0_size, prec, tile_ld);
void snrt_dma_disable_reduction()
Disable reduction operations for successive transfers.
Definition dma.h:130
void snrt_dma_set_awuser(uint64_t field)
Set AW user field of the DMA's AXI interface.
Definition dma.h:80
snrt_dma_txid_t snrt_dma_load_1d_tile_mcast(void *dst, void *src, size_t tile_idx, size_t tile_size, uint32_t prec, uint64_t mask)
Load a tile of a 1D array.
Definition dma.h:466
void snrt_dma_disable_multicast()
Disable multicast for successive transfers.
Definition dma.h:124
snrt_dma_txid_t snrt_dma_load_1d_tile(volatile void *dst, volatile void *src, size_t tile_idx, size_t tile_size, uint32_t prec)
Load a tile of a 1D array.
Definition dma.h:448
snrt_dma_txid_t snrt_dma_1d_to_2d(volatile void *dst, volatile void *src, size_t size, size_t row_size, size_t stride)
Transfer and reshape a 1D array into a 2D array.
Definition dma.h:504
static snrt_dma_txid_t snrt_dma_start_2d(uint64_t dst, uint64_t src, size_t size, size_t dst_stride, size_t src_stride, size_t repeat, const uint32_t channel=0)
Start an asynchronous 2D DMA transfer with 64-bit wide pointers.
Definition dma.h:246
snrt_dma_txid_t snrt_dma_store_2d_tile_from_banks(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t num_banks)
Store a 2D tile of a 2D array from a 1D layout occupying a subset of TCDM banks.
Definition dma.h:757
static uint32_t snrt_dma_start_1d(uint64_t dst, uint64_t src, size_t size, const uint32_t channel=0)
Start an asynchronous 1D DMA transfer with 64-bit wide pointers on a specific DMA channel.
Definition dma.h:35
uint32_t snrt_dma_txid_t
A DMA transfer identifier.
Definition dma.h:19
static uint32_t snrt_dma_start_1d_reduction(uint64_t dst, uint64_t src, size_t size, uint64_t mask, snrt_collective_opcode_t opcode, const uint32_t channel=0)
Start an asynchronous reduction 1D DMA transfer with 64-bit wide pointers.
Definition dma.h:140
snrt_dma_txid_t snrt_dma_store_2d_tile(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t tile_ld)
Store a 2D tile to a 2D array.
Definition dma.h:704
snrt_dma_txid_t snrt_dma_load_2d_tile_in_banks(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t num_banks)
Load a 2D tile of a 2D array and reshape it to occupy a subset of TCDM banks.
Definition dma.h:675
snrt_dma_txid_t snrt_dma_store_1d_tile(void *dst, void *src, size_t tile_idx, size_t tile_size, uint32_t prec)
Store a tile to a 1D array.
Definition dma.h:534
static uint32_t snrt_dma_start_2d_mcast(uint64_t dst, uint64_t src, size_t size, size_t dst_stride, size_t src_stride, size_t repeat, uint32_t mask, const uint32_t channel=0)
Start an asynchronous, multicast 2D DMA transfer with 64-bit wide pointers.
Definition dma.h:301
snrt_dma_txid_t snrt_dma_2d_to_1d(volatile void *dst, volatile void *src, size_t size, size_t row_size, size_t stride)
Transfer and reshape a 2D array into a 1D array.
Definition dma.h:519
void snrt_dma_enable_reduction(uint64_t mask, snrt_collective_opcode_t opcode)
Enable reduction operations for successive transfers.
Definition dma.h:112
void snrt_dma_wait_all_channels(uint32_t num_channels)
Block until the first num_channels channels are idle.
Definition dma.h:380
static uint32_t snrt_dma_start_1d_mcast(uint64_t dst, uint64_t src, size_t size, uint64_t mask, const uint32_t channel=0)
Start an asynchronous multicast 1D DMA transfer with 64-bit wide pointers.
Definition dma.h:173
snrt_dma_txid_t snrt_dma_reduction_load_1d_tile(void *dst, void *src, size_t tile_idx, size_t tile_size, uint32_t prec, uint64_t mask, snrt_collective_opcode_t opcode)
Load a tile of a 1D array.
Definition dma.h:487
void snrt_dma_memset(void *ptr, uint8_t value, uint32_t len)
Fast memset function performed by DMA.
Definition dma.h:417
void snrt_dma_enable_multicast(uint64_t mask)
Enable multicast for successive transfers.
Definition dma.h:97
static void snrt_dma_wait(snrt_dma_txid_t txid, const uint32_t channel=0)
Block until a DMA transfer finishes on a specific DMA channel.
Definition dma.h:342
snrt_dma_txid_t snrt_dma_load_2d_tile(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t tile_ld)
Load a 2D tile of a 2D array.
Definition dma.h:557
static void snrt_dma_wait_all(const uint32_t channel=0)
Block until a specific DMA channel is idle.
Definition dma.h:364
void snrt_dma_start_tracking()
Start tracking of dma performance region. Does not have any implications on the HW....
Definition dma.h:392
snrt_dma_txid_t snrt_dma_load_2d_tile_mcast(void *dst, void *src, size_t tile_x1_idx, size_t tile_x0_idx, size_t tile_x1_size, size_t tile_x0_size, size_t full_x0_size, uint32_t prec, size_t tile_ld, uint32_t mask)
Load a 2D tile of a 2D array using multicast.
Definition dma.h:601
void snrt_dma_stop_tracking()
Stop tracking of dma performance region. Does not have any implications on the HW....
Definition dma.h:404
Definition sync_decls.h:14
Definition sync_decls.h:40