Module axi_burst_splitter_gran

Split AXI4 bursts into single-beat transactions.

Limitations

Parameters

MaxReadTxns: int unsigned

Maximum number of AXI read bursts outstanding at the same time

MaxWriteTxns: int unsigned

Maximum number of AXI write bursts outstanding at the same time

FullBW: bit

Internal ID queue can work in two bandwidth modes: see id_queue.sv for details

CutPath: bit

Cut paths through the IP

DisableChecks: bit

Disable checks, handle unsupported transfers as bypass instead of reporting an error

AddrWidth: int unsigned

DataWidth: int unsigned

IdWidth: int unsigned

UserWidth: int unsigned

axi_req_t: type

axi_resp_t: type

axi_aw_chan_t: type

axi_w_chan_t: type

axi_b_chan_t: type

axi_ar_chan_t: type

axi_r_chan_t: type

MaxTxns: int unsigned

Ports

clk_i: input logic

rst_ni: input logic

len_limit_i: input axi_pkg::len_t

slv_req_i: input axi_req_t

slv_resp_o: output axi_resp_t

mst_req_o: output axi_req_t

mst_resp_i: input axi_resp_t

Signals

slv_req: axi_req_t

act_req: axi_req_t

unsupported_req: axi_req_t

slv_resp: axi_resp_t

act_resp: axi_resp_t

unsupported_resp: axi_resp_t