Module axi_id_serialize_intf
Interface variant of axi_id_serialize.
See the documentation of the main module for the definition of ports and parameters.
Parameters
AXI_SLV_PORT_ID_WIDTH: int unsigned
AXI_SLV_PORT_MAX_TXNS: int unsigned
AXI_MST_PORT_ID_WIDTH: int unsigned
AXI_MST_PORT_MAX_UNIQ_IDS: int unsigned
AXI_MST_PORT_MAX_TXNS_PER_ID: int unsigned
AXI_ADDR_WIDTH: int unsigned
AXI_DATA_WIDTH: int unsigned
AXI_USER_WIDTH: int unsigned
Ports
clk_i: input logic
rst_ni: input logic
slv: AXI_BUS.Slave
mst: AXI_BUS.Master
Types
| slv_id_t | |
| mst_id_t | |
| addr_t | |
| data_t | |
| strb_t | |
| user_t | |
| slv_aw_t | |
| w_t | |
| slv_b_t | |
| slv_ar_t | |
| slv_r_t | |
| slv_req_t | |
| slv_resp_t | |
| mst_aw_t | |
| mst_b_t | |
| mst_ar_t | |
| mst_r_t | |
| mst_req_t | |
| mst_resp_t |