Module axi_xp
AXI Crosspoint (XP) with homomorphous slave and master ports.
Parameters
ATOPs: bit
Cfg: axi_pkg::xbar_cfg_t
NumSlvPorts: int unsigned
Number of slave ports.
NumMstPorts: int unsigned
Number of master ports.
Connectivity: bit [NumSlvPorts-1:0][NumMstPorts-1:0]
Connectivity from a slave port to the master ports. A 1'b1 in Connectivity[i][j] means
that slave port i is connected to master port j. By default, all slave ports are
connected to all master ports.
AxiAddrWidth: int unsigned
Address width of all ports.
AxiDataWidth: int unsigned
Data width of all ports.
AxiIdWidth: int unsigned
ID width of all ports.
AxiUserWidth: int unsigned
User signal width of all ports.
AxiSlvPortMaxUniqIds: int unsigned
Maximum number of different IDs that can be in flight at each slave port. Reads and writes
are counted separately (except for ATOPs, which count as both read and write).
It is legal for upstream to have transactions with more unique IDs than the maximum given by
this parameter in flight, but a transaction exceeding the maximum will be stalled until all
transactions of another ID complete.
AxiSlvPortMaxTxnsPerId: int unsigned
Maximum number of in-flight transactions with the same ID at the slave port.
This parameter is only relevant if AxiSlvPortMaxUniqIds <= 2**AxiMstPortIdWidth. In that
case, this parameter is passed to [axi_id_remap as AxiMaxTxnsPerId
parameter](module.axi_id_remap#parameter.AxiMaxTxnsPerId).
AxiSlvPortMaxTxns: int unsigned
Maximum number of in-flight transactions at the slave port. Reads and writes are counted
separately (except for ATOPs, which count as both read and write).
This parameter is only relevant if AxiSlvPortMaxUniqIds > 2**AxiMstPortIdWidth. In that
case, this parameter is passed to
AxiMstPortMaxUniqIds: int unsigned
Maximum number of different IDs that can be in flight at the master port. Reads and writes
are counted separately (except for ATOPs, which count as both read and write).
This parameter is only relevant if AxiSlvPortMaxUniqIds > 2**AxiMstPortIdWidth. In that
case, this parameter is passed to
AxiMstPortMaxTxnsPerId: int unsigned
Maximum number of in-flight transactions with the same ID at the master port.
This parameter is only relevant if AxiSlvPortMaxUniqIds > 2**AxiMstPortIdWidth. In that
case, this parameter is passed to
NumAddrRules: int unsigned
Number of rules in the address map.
axi_req_t: type
Request struct type of the AXI4+ATOP
axi_resp_t: type
Response struct type of the AXI4+ATOP
rule_t: type
Rule type (see documentation of axi_xbar for details).
AxiXbarIdWidth: int unsigned
Ports
clk_i: input logic
Rising-edge clock of all ports
rst_ni: input logic
Asynchronous reset, active low
test_en_i: input logic
Test mode enable
slv_req_i: input axi_req_t [NumSlvPorts-1:0]
Slave ports request
slv_resp_o: output axi_resp_t [NumSlvPorts-1:0]
Slave ports response
mst_req_o: output axi_req_t [NumMstPorts-1:0]
Master ports request
mst_resp_i: input axi_resp_t [NumMstPorts-1:0]
Master ports response
addr_map_i: input rule_t [NumAddrRules-1:0]
Address map for transferring transactions from slave to master ports
Types
| addr_t | |
| data_t | |
| id_t | |
| xbar_id_t | |
| strb_t | |
| user_t | |
| xp_aw_chan_t | |
| xp_w_chan_t | |
| xp_b_chan_t | |
| xp_ar_chan_t | |
| xp_r_chan_t | |
| xp_req_t | |
| xp_resp_t | |
| xbar_aw_chan_t | |
| xbar_w_chan_t | |
| xbar_b_chan_t | |
| xbar_ar_chan_t | |
| xbar_r_chan_t | |
| xbar_req_t | |
| xbar_resp_t |