Synthesis

[INFO][ENV] Croc root: /fosic/designs/croc
[INFO][ENV] PDK root: /fosic/designs/croc/technology
[INFO][ENV] Croc PDK: sg13cmos5l
[INFO][ENV] Active technology view: public mirror
[INFO][ENV] KLayout path: /fosic/designs/croc/ihp13/sg13cmos5l/libs.tech/klayout
[INFO][ENV] Bender PDK args: -D IHP_SG13CMOS5L=1
[INFO][ENV] Tech LEF: sg13cmos5l_tech.lef
[INFO][ENV] IO LEF/GDS: sg13cmos5l_io.lef/sg13cmos5l_io.gds
[INFO][ENV] IO Liberty tt/ff: sg13cmos5l_io_typ_1p2V_3p3V_25C.lib/sg13cmos5l_io_fast_1p32V_3p6V_m40C.lib
[INFO][ENV] Bondpad LEF/GDS: bondpad5l_70x70.lef/bondpad5l_70x70.gds
[INFO][Bender] Generate src/croc.flist
warning: [W03] Ignoring unknown field `pass_targets` in a dependency in manifest for croc_soc.
[INFO][Bender] Remove absolute paths
[INFO][Bender] File list generated: src/croc.flist
[INFO][Yosys] Synthesizing croc_chip
[2026-10-16 13:18 UTC] 1. Executing Liberty frontend: /fosic/designs/croc/technology/lib/sg13g2_stdcell_typ_1p20V_25C.lib
[2026-10-16 13:18 UTC] 2. Executing Liberty frontend: /fosic/designs/croc/technology/lib/RM_IHPSG13_1P_2048x64_c2_bm_bist_typ_1p20V_25C.lib
[2026-10-16 13:18 UTC] 3. Executing Liberty frontend: /fosic/designs/croc/technology/lib/RM_IHPSG13_1P_256x48_c2_bm_bist_typ_1p20V_25C.lib
[2026-10-16 13:18 UTC] 4. Executing Liberty frontend: /fosic/designs/croc/technology/lib/RM_IHPSG13_1P_256x64_c2_bm_bist_typ_1p20V_25C.lib
[2026-10-16 13:18 UTC] 5. Executing Liberty frontend: /fosic/designs/croc/technology/lib/RM_IHPSG13_1P_512x32_c2_bm_bist_typ_1p20V_25C.lib
[2026-10-16 13:18 UTC] 6. Executing Liberty frontend: /fosic/designs/croc/technology/lib/RM_IHPSG13_1P_1024x64_c2_bm_bist_typ_1p20V_25C.lib
[2026-10-16 13:18 UTC] 7. Executing Liberty frontend: /fosic/designs/croc/technology/lib/RM_IHPSG13_1P_512x64_c2_bm_bist_typ_1p20V_25C.lib
[2026-10-16 13:18 UTC] 8. Executing Liberty frontend: /fosic/designs/croc/technology/lib/RM_IHPSG13_1P_64x64_c2_bm_bist_typ_1p20V_25C.lib
[2026-10-16 13:18 UTC] 9. Executing Liberty frontend: /fosic/designs/croc/technology/lib/sg13cmos5l_io_typ_1p2V_3p3V_25C.lib
[2026-10-16 13:18 UTC] 10. Executing SLANG frontend.
[2026-10-16 13:18 UTC] Top level design units:
[2026-10-16 13:18 UTC]     croc_chip
[2026-10-16 13:18 UTC] 
[2026-10-16 13:18 UTC] Build succeeded: 0 Error, 0 Warning
[2026-10-16 13:18 UTC] 
[2026-10-16 13:18 UTC] 10.1. Executing UNDRIVEN pass. (resolve undriven signals)
[2026-10-16 13:18 UTC] 10.1. Executing UNDRIVEN pass. (resolve undriven signals)
[2026-10-16 13:18 UTC] 10.2. Executing PROC_CLEAN pass (remove empty switches from decision trees).
[2026-10-16 13:18 UTC] 10.3. Executing TRIBUF pass.
[2026-10-16 13:18 UTC] 10.4. Executing PROC_RMDEAD pass (remove dead branches from decision trees).
[2026-10-16 13:18 UTC] 10.5. Executing PROC_PRUNE pass (remove redundant assignments in processes).
[2026-10-16 13:18 UTC] 10.6. Executing PROC_INIT pass (extract init attributes).
[2026-10-16 13:18 UTC] 10.7. Executing PROC_ROM pass (convert switches to ROMs).
[2026-10-16 13:18 UTC] 10.8. Executing PROC_MUX pass (convert decision trees to multiplexers).
[2026-10-16 13:18 UTC] 10.9. Executing PROC_CLEAN pass (remove empty switches from decision trees).
[2026-10-16 13:18 UTC] 10.10. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 11. Executing ATTRMAP pass (move or copy attributes).
[2026-10-16 13:18 UTC] 12. Executing ATTRMAP pass (move or copy attributes).
[2026-10-16 13:18 UTC] 13. Executing ATTRMVCP pass (move or copy attributes).
[2026-10-16 13:18 UTC] 14. Executing HIERARCHY pass (managing design hierarchy).
[2026-10-16 13:18 UTC] 15. Executing CHECK pass (checking for obvious problems).
[2026-10-16 13:18 UTC] 16. Executing PROC pass (convert processes to netlists).
[2026-10-16 13:18 UTC] 16.1. Executing PROC_CLEAN pass (remove empty switches from decision trees).
[2026-10-16 13:18 UTC] 16.2. Executing PROC_RMDEAD pass (remove dead branches from decision trees).
[2026-10-16 13:18 UTC] 16.3. Executing PROC_PRUNE pass (remove redundant assignments in processes).
[2026-10-16 13:18 UTC] 16.4. Executing PROC_INIT pass (extract init attributes).
[2026-10-16 13:18 UTC] 16.5. Executing PROC_ARST pass (detect async resets in processes).
[2026-10-16 13:18 UTC] 16.6. Executing PROC_ROM pass (convert switches to ROMs).
[2026-10-16 13:18 UTC] 16.7. Executing PROC_MUX pass (convert decision trees to multiplexers).
[2026-10-16 13:18 UTC] 16.8. Executing PROC_DLATCH pass (convert process syncs to latches).
[2026-10-16 13:18 UTC] 16.9. Executing PROC_DFF pass (convert process syncs to FFs).
[2026-10-16 13:18 UTC] 16.10. Executing PROC_MEMWR pass (convert process memory writes to cells).
[2026-10-16 13:18 UTC] 16.11. Executing PROC_CLEAN pass (remove empty switches from decision trees).
[2026-10-16 13:18 UTC] 16.12. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 18. Executing Verilog backend.
[2026-10-16 13:18 UTC] 19. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 20. Executing OPT pass (performing simple optimizations).
[2026-10-16 13:18 UTC] 20.1. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 20.2. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 20.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).
[2026-10-16 13:18 UTC] 20.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).
[2026-10-16 13:18 UTC] 20.5. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 20.6. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 20.7. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 20.9. Executing OPT_MUXTREE pass (detect dead branches in mux trees).
[2026-10-16 13:18 UTC] 20.10. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).
[2026-10-16 13:18 UTC] 20.11. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 20.12. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 20.13. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 20.15. Executing OPT_MUXTREE pass (detect dead branches in mux trees).
[2026-10-16 13:18 UTC] 20.16. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).
[2026-10-16 13:18 UTC] 20.17. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 20.18. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 20.19. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 21. Executing FSM pass (extract and optimize FSM).
[2026-10-16 13:18 UTC] 21.1. Executing FSM_DETECT pass (finding FSMs in design).
[2026-10-16 13:18 UTC] 21.2. Executing FSM_EXTRACT pass (extracting FSM from design).
[2026-10-16 13:18 UTC] 21.3. Executing FSM_OPT pass (simple optimizations of FSMs).
[2026-10-16 13:18 UTC] 21.4. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 21.5. Executing FSM_OPT pass (simple optimizations of FSMs).
[2026-10-16 13:18 UTC] 21.6. Executing FSM_RECODE pass (re-assigning FSM state encoding).
[2026-10-16 13:18 UTC] 21.7. Executing FSM_INFO pass (dumping all available information on FSM cells).
[2026-10-16 13:18 UTC] 21.8. Executing FSM_MAP pass (mapping FSMs to basic logic).
[2026-10-16 13:18 UTC] 22. Executing WREDUCE pass (reducing word size of cells).
[2026-10-16 13:18 UTC] 23. Executing PEEPOPT pass (run peephole optimizers).
[2026-10-16 13:18 UTC] 24. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 25. Executing OPT pass (performing simple optimizations).
[2026-10-16 13:18 UTC] 25.1. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 25.2. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 25.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).
[2026-10-16 13:18 UTC] 25.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).
[2026-10-16 13:18 UTC] 25.5. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 25.6. Executing OPT_SHARE pass.
[2026-10-16 13:18 UTC] 25.7. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 25.8. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 25.9. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 25.11. Executing OPT_MUXTREE pass (detect dead branches in mux trees).
[2026-10-16 13:18 UTC] 25.12. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).
[2026-10-16 13:18 UTC] 25.13. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 25.14. Executing OPT_SHARE pass.
[2026-10-16 13:18 UTC] 25.15. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 25.16. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 25.17. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 25.19. Executing OPT_MUXTREE pass (detect dead branches in mux trees).
[2026-10-16 13:18 UTC] 25.20. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).
[2026-10-16 13:18 UTC] 25.21. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 25.22. Executing OPT_SHARE pass.
[2026-10-16 13:18 UTC] 25.23. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 25.24. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 25.25. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 25.27. Executing OPT_MUXTREE pass (detect dead branches in mux trees).
[2026-10-16 13:18 UTC] 25.28. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).
[2026-10-16 13:18 UTC] 25.29. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 25.30. Executing OPT_SHARE pass.
[2026-10-16 13:18 UTC] 25.31. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 25.32. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 25.33. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 25.35. Executing OPT_MUXTREE pass (detect dead branches in mux trees).
[2026-10-16 13:18 UTC] 25.36. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).
[2026-10-16 13:18 UTC] 25.37. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 25.38. Executing OPT_SHARE pass.
[2026-10-16 13:18 UTC] 25.39. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 25.40. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 25.41. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 26. Executing BOOTH pass (map to Booth multipliers).
[2026-10-16 13:18 UTC] 27. Executing SHARE pass (SAT-based resource sharing).
[2026-10-16 13:18 UTC] 28. Executing OPT pass (performing simple optimizations).
[2026-10-16 13:18 UTC] 28.1. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 28.2. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 28.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).
[2026-10-16 13:18 UTC] 28.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).
[2026-10-16 13:18 UTC] 28.5. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 28.6. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 28.7. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 28.8. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 29. Executing MEMORY pass.
[2026-10-16 13:18 UTC] 29.1. Executing OPT_MEM pass (optimize memories).
[2026-10-16 13:18 UTC] 29.2. Executing OPT_MEM_PRIORITY pass (removing unnecessary memory write priority relations).
[2026-10-16 13:18 UTC] 29.3. Executing OPT_MEM_FEEDBACK pass (finding memory read-to-write feedback paths).
[2026-10-16 13:18 UTC] 29.4. Executing MEMORY_BMUX2ROM pass (converting muxes to ROMs).
[2026-10-16 13:18 UTC] 29.5. Executing MEMORY_DFF pass (merging $dff cells to $memrd).
[2026-10-16 13:18 UTC] 29.6. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 29.7. Executing MEMORY_SHARE pass (consolidating $memrd/$memwr cells).
[2026-10-16 13:18 UTC] 29.8. Executing OPT_MEM_WIDEN pass (optimize memories where all ports are wide).
[2026-10-16 13:18 UTC] 29.9. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 29.10. Executing MEMORY_COLLECT pass (generating $mem cells).
[2026-10-16 13:18 UTC] 30. Executing MEMORY_MAP pass (converting memories to logic and flip-flops).
[2026-10-16 13:18 UTC] 31. Executing OPT pass (performing simple optimizations).
[2026-10-16 13:18 UTC] 31.1. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 31.2. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 31.3. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 31.4. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 32. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 33. Executing SHARE pass (SAT-based resource sharing).
[2026-10-16 13:18 UTC] 34. Executing OPT pass (performing simple optimizations).
[2026-10-16 13:18 UTC] 34.1. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 34.2. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 34.3. Executing OPT_MUXTREE pass (detect dead branches in mux trees).
[2026-10-16 13:18 UTC] 34.4. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).
[2026-10-16 13:18 UTC] 34.5. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 34.6. Executing OPT_SHARE pass.
[2026-10-16 13:18 UTC] 34.7. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 34.8. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 34.9. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 34.11. Executing OPT_MUXTREE pass (detect dead branches in mux trees).
[2026-10-16 13:18 UTC] 34.12. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).
[2026-10-16 13:18 UTC] 34.13. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 34.14. Executing OPT_SHARE pass.
[2026-10-16 13:18 UTC] 34.15. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 34.16. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 34.17. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 34.19. Executing OPT_MUXTREE pass (detect dead branches in mux trees).
[2026-10-16 13:18 UTC] 34.20. Executing OPT_REDUCE pass (consolidate $*mux and $reduce_* inputs).
[2026-10-16 13:18 UTC] 34.21. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 34.22. Executing OPT_SHARE pass.
[2026-10-16 13:18 UTC] 34.23. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 34.24. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 34.25. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 35. Executing Verilog backend.
[2026-10-16 13:18 UTC] 37. Executing TECHMAP pass (map to technology primitives).
[2026-10-16 13:18 UTC] 37.1. Executing Verilog-2005 frontend: /foss/tools/yosys/bin/../share/yosys/techmap.v
[2026-10-16 13:18 UTC] 38. Executing OPT pass (performing simple optimizations).
[2026-10-16 13:18 UTC] 38.1. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 38.2. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 38.3. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 38.4. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 38.6. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 38.7. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 38.8. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 38.9. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 38.11. Executing OPT_EXPR pass (perform const folding).
[2026-10-16 13:18 UTC] 38.12. Executing OPT_MERGE pass (detect identical cells).
[2026-10-16 13:18 UTC] 38.13. Executing OPT_DFF pass (perform DFF optimizations).
[2026-10-16 13:18 UTC] 38.14. Executing OPT_CLEAN pass (remove unused cells and wires).
[2026-10-16 13:18 UTC] 40. Executing FLATTEN pass (flatten design).
[2026-10-16 13:18 UTC] 41. Executing Verilog backend.
[2026-10-16 13:18 UTC] 41.1. Executing BMUXMAP pass.
[2026-10-16 13:18 UTC] 41.2. Executing DEMUXMAP pass.
[2026-10-16 13:19 UTC] 42. Executing SPLITNETS pass (splitting up multi-bit signals).
[2026-10-16 13:19 UTC] 43. Executing Verilog backend.
[2026-10-16 13:19 UTC] 43.1. Executing BMUXMAP pass.
[2026-10-16 13:19 UTC] 43.2. Executing DEMUXMAP pass.
[2026-10-16 13:19 UTC] 44. Executing AUTONAME pass.
[2026-10-16 13:19 UTC] 45. Executing DFFLIBMAP pass (mapping DFF cells to sequential cells from liberty file).
[2026-10-16 13:19 UTC] 45.1. Executing DFFLEGALIZE pass (convert FFs to types supported by the target).
[2026-10-16 13:19 UTC] 46. Executing ABC pass (technology mapping using ABC).
[2026-10-16 13:22 UTC] 47. Executing Verilog backend.
[2026-10-16 13:22 UTC] 48. Executing SPLITNETS pass (splitting up multi-bit signals).
[2026-10-16 13:22 UTC] 49. Executing SETUNDEF pass (replace undef values with defined constants).
[2026-10-16 13:22 UTC] 50. Executing HILOMAP pass (mapping to constant drivers).
[2026-10-16 13:22 UTC] 54. Executing Verilog backend.