This file contains functions to conveniently program Snitch's SSRs. More...

Enumerations
enum	snrt_ssr_dm_t { SNRT_SSR_DM0 = 0 , SNRT_SSR_DM1 = 1 , SNRT_SSR_DM2 = 2 , SNRT_SSR_DM_ALL = 31 }
	The different SSRs. More...

enum	snrt_ssr_dim_t { SNRT_SSR_1D = 0 , SNRT_SSR_2D = 1 , SNRT_SSR_3D = 2 , SNRT_SSR_4D = 3 }
	The different dimensions. More...

enum	snrt_ssr_reg_t { SNRT_SSR_REG_STATUS = 0 , SNRT_SSR_REG_REPEAT = 1 , SNRT_SSR_REG_BOUNDS = 2 , SNRT_SSR_REG_STRIDES = 6 , SNRT_SSR_REG_IDX_CFG = 10 , SNRT_SSR_REG_IDX_BASE = 11 , SNRT_SSR_REG_RPTR_INDIR = 16 , SNRT_SSR_REG_RPTR = 24 , SNRT_SSR_REG_WPTR = 28 }
	The SSR configuration registers. More...

enum	snrt_ssr_idxsize_t { SNRT_SSR_IDXSIZE_U8 = 0 , SNRT_SSR_IDXSIZE_U16 = 1 , SNRT_SSR_IDXSIZE_U32 = 2 , SNRT_SSR_IDXSIZE_U64 = 3 }
	The size of the SSSR indirection indices. More...

Functions
void	snrt_fpu_fence ()
	Synchronize the integer and float pipelines.

void	snrt_ssr_enable ()
	Enable all SSRs.

void	snrt_ssr_disable ()
	Disable all SSRs.

void	snrt_sc_enable (uint32_t mask)
	Enable scalar chaining.

void	snrt_sc_disable (uint32_t mask)
	Disable scalar chaining.

Detailed Description

This file contains functions to conveniently program Snitch's SSRs.

An SSR stream can be configured to replace a store (or load) sequence as could be generated by an N-dimensional affine loop nest, e.g. the following store sequence can be mapped to a 2D write SSR:

for (int i = 0; i < b1; i++)
    for (int j = 0; j < b0; j++)
        ptr[i * s1 + j * s0] = 0;

An ISSR (Indirect SSR) stream can be configured to replace a store (or load) sequence as could be generated by:

for (int i = 0; i < bound; i++)

base[idcs[i]] = 0;

The convenience functions provided in this file can be used to set up such access patterns. The function argument names reflect the variable names presented in these sample code snippets.

Note: The exact number of elements configured in an (I)SSR stream must be consumed. Failure to comply with this requirement will result in undefined behaviour.

Enumeration Type Documentation

◆ snrt_ssr_dim_t

enum snrt_ssr_dim_t

The different dimensions.

Enumerator
SNRT_SSR_1D	1D stream
SNRT_SSR_2D	2D stream
SNRT_SSR_3D	3D stream
SNRT_SSR_4D	4D stream

◆ snrt_ssr_dm_t

enum snrt_ssr_dm_t

The different SSRs.

Enumerator
SNRT_SSR_DM0	SSR data mover 0
SNRT_SSR_DM1	SSR data mover 1
SNRT_SSR_DM2	SSR data mover 2
SNRT_SSR_DM_ALL	Write to all SSRs

◆ snrt_ssr_idxsize_t

enum snrt_ssr_idxsize_t

The size of the SSSR indirection indices.

Enumerator
SNRT_SSR_IDXSIZE_U8	Unsigned 8-bit integer
SNRT_SSR_IDXSIZE_U16	Unsigned 16-bit integer
SNRT_SSR_IDXSIZE_U32	Unsigned 32-bit integer
SNRT_SSR_IDXSIZE_U64	Unsigned 64-bit integer

◆ snrt_ssr_reg_t

enum snrt_ssr_reg_t

The SSR configuration registers.

Enumerator
SNRT_SSR_REG_STATUS	SSR status register
SNRT_SSR_REG_REPEAT	SSR repeat register
SNRT_SSR_REG_BOUNDS	SSR bounds register
SNRT_SSR_REG_STRIDES	SSR strides register
SNRT_SSR_REG_IDX_CFG	SSSR index configuration register
SNRT_SSR_REG_IDX_BASE	SSSR base address register
SNRT_SSR_REG_RPTR_INDIR	SSSR indir. indices read ptr register
SNRT_SSR_REG_RPTR	SSR read pointer register
SNRT_SSR_REG_WPTR	SSR write pointer register

Function Documentation

◆ snrt_sc_enable()

void snrt_sc_enable ( uint32_t mask )

inline

Enable scalar chaining.

Parameters

mask	A bitmask indicating which registers should be enabled for chaining.

Enumerations

Functions