Snitch Runtime
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ssr.h
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1// Copyright 2023 ETH Zurich and University of Bologna.
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4
34#pragma once
35
39inline void snrt_fpu_fence() {
40 unsigned tmp;
41 asm volatile(
42 "fmv.x.w %0, fa0\n"
43 "mv %0, %0\n"
44 : "+r"(tmp)::"memory");
45}
46
56
66
81
91
95inline void snrt_ssr_enable() {
96#ifdef __TOOLCHAIN_LLVM__
97 __builtin_ssr_enable();
98#else
99 asm volatile("csrsi 0x7C0, 1\n");
100#endif
101}
102
106inline void snrt_ssr_disable() {
107#ifdef __TOOLCHAIN_LLVM__
108 __builtin_ssr_disable();
109#else
110 asm volatile("csrci 0x7C0, 1\n");
111#endif
112}
113
119inline void snrt_sc_enable(uint32_t mask) {
120 asm volatile("csrs 0x7C3, %[mask]\n" : : [ mask ] "r"(mask) :);
121}
122
126inline void snrt_sc_disable(uint32_t mask) {
127 asm volatile("csrc 0x7C3, %[mask]\n" : : [ mask ] "r"(mask) :);
128}
129
136static inline uint32_t read_ssr_cfg(const snrt_ssr_reg_t reg,
137 const snrt_ssr_dm_t dm) {
138 uint32_t value;
139 asm volatile("scfgri %[value], %[dm] | %[reg]<<5\n"
140 : [ value ] "=r"(value)
141 : [ dm ] "i"(dm), [ reg ] "i"(reg));
142 return value;
143}
144
156static inline void write_ssr_cfg(const snrt_ssr_reg_t reg,
157 const snrt_ssr_dm_t dm, uint32_t value) {
158 asm volatile("scfgwi %[value], %[dm] | %[reg]<<5\n" ::[value] "r"(value),
159 [ dm ] "i"(dm), [ reg ] "i"(reg));
160}
161
168static inline void snrt_ssr_loop_1d(const snrt_ssr_dm_t dm, size_t b0,
169 size_t s0) {
170 --b0;
172 size_t a = 0;
174 a += s0 * b0;
175}
176
185static inline void snrt_ssr_loop_2d(const snrt_ssr_dm_t dm, size_t b0,
186 size_t b1, size_t s0, size_t s1) {
187 --b0;
188 --b1;
191 size_t a = 0;
193 a += s0 * b0;
195 a += s1 * b1;
196}
197
208static inline void snrt_ssr_loop_3d(const snrt_ssr_dm_t dm, size_t b0,
209 size_t b1, size_t b2, size_t s0, size_t s1,
210 size_t s2) {
211 --b0;
212 --b1;
213 --b2;
217 size_t a = 0;
219 a += s0 * b0;
221 a += s1 * b1;
223 a += s2 * b2;
224}
225
238static inline void snrt_ssr_loop_4d(const snrt_ssr_dm_t dm, size_t b0,
239 size_t b1, size_t b2, size_t b3, size_t s0,
240 size_t s1, size_t s2, size_t s3) {
241 --b0;
242 --b1;
243 --b2;
244 --b3;
249 size_t a = 0;
251 a += s0 * b0;
253 a += s1 * b1;
255 a += s2 * b2;
257 a += s3 * b3;
258}
259
265static inline void snrt_ssr_repeat(const snrt_ssr_dm_t dm, size_t count) {
266 write_ssr_cfg(SNRT_SSR_REG_REPEAT, dm, count - 1);
267}
268
275static inline void snrt_ssr_read(const snrt_ssr_dm_t dm,
276 const snrt_ssr_dim_t dim, volatile void *ptr) {
278 (uintptr_t)ptr);
279}
280
287static inline void snrt_ssr_write(const snrt_ssr_dm_t dm,
288 const snrt_ssr_dim_t dim,
289 volatile void *ptr) {
291 (uintptr_t)ptr);
292}
293
302static inline void snrt_issr_set_idx_cfg(const snrt_ssr_dm_t dm,
303 snrt_ssr_idxsize_t idxsize) {
304 write_ssr_cfg(SNRT_SSR_REG_IDX_CFG, dm, (idxsize & 0xFF));
305}
306
307static inline void snrt_issr_set_bound(const snrt_ssr_dm_t dm, size_t bound) {
309}
310
311static inline void snrt_issr_set_ptrs(const snrt_ssr_dm_t dm,
312 volatile void *base,
313 volatile void *idcs) {
314 write_ssr_cfg(SNRT_SSR_REG_IDX_BASE, dm, (uintptr_t)base);
315 write_ssr_cfg(SNRT_SSR_REG_RPTR_INDIR, dm, (uintptr_t)idcs);
316}
317
318static inline void snrt_issr_read(const snrt_ssr_dm_t dm, volatile void *base,
319 volatile void *idcs, size_t bound,
320 snrt_ssr_idxsize_t idxsize) {
321 snrt_issr_set_idx_cfg(dm, idxsize);
322 snrt_issr_set_bound(dm, bound);
323 snrt_issr_set_ptrs(dm, base, idcs);
324}
void snrt_sc_disable(uint32_t mask)
Disable scalar chaining.
Definition ssr.h:126
static void snrt_ssr_read(const snrt_ssr_dm_t dm, const snrt_ssr_dim_t dim, volatile void *ptr)
Start a streaming read.
Definition ssr.h:275
static void snrt_ssr_loop_2d(const snrt_ssr_dm_t dm, size_t b0, size_t b1, size_t s0, size_t s1)
Configure an SSR data mover for a 2D loop nest.
Definition ssr.h:185
static void snrt_ssr_write(const snrt_ssr_dm_t dm, const snrt_ssr_dim_t dim, volatile void *ptr)
Start a streaming write.
Definition ssr.h:287
snrt_ssr_dm_t
The different SSRs.
Definition ssr.h:50
@ SNRT_SSR_DM0
Definition ssr.h:51
@ SNRT_SSR_DM_ALL
Definition ssr.h:54
@ SNRT_SSR_DM1
Definition ssr.h:52
@ SNRT_SSR_DM2
Definition ssr.h:53
snrt_ssr_idxsize_t
The size of the SSSR indirection indices.
Definition ssr.h:85
@ SNRT_SSR_IDXSIZE_U8
Definition ssr.h:86
@ SNRT_SSR_IDXSIZE_U16
Definition ssr.h:87
@ SNRT_SSR_IDXSIZE_U32
Definition ssr.h:88
@ SNRT_SSR_IDXSIZE_U64
Definition ssr.h:89
static void snrt_issr_set_idx_cfg(const snrt_ssr_dm_t dm, snrt_ssr_idxsize_t idxsize)
Start a streaming indirect read.
Definition ssr.h:302
static void snrt_ssr_loop_4d(const snrt_ssr_dm_t dm, size_t b0, size_t b1, size_t b2, size_t b3, size_t s0, size_t s1, size_t s2, size_t s3)
Configure an SSR data mover for a 4D loop nest.
Definition ssr.h:238
static void snrt_ssr_repeat(const snrt_ssr_dm_t dm, size_t count)
Configure the repetition count for a stream.
Definition ssr.h:265
void snrt_ssr_enable()
Enable all SSRs.
Definition ssr.h:95
static void snrt_ssr_loop_1d(const snrt_ssr_dm_t dm, size_t b0, size_t s0)
Configure an SSR data mover for a 1D loop nest.
Definition ssr.h:168
static void snrt_ssr_loop_3d(const snrt_ssr_dm_t dm, size_t b0, size_t b1, size_t b2, size_t s0, size_t s1, size_t s2)
Configure an SSR data mover for a 3D loop nest.
Definition ssr.h:208
void snrt_ssr_disable()
Disable all SSRs.
Definition ssr.h:106
void snrt_sc_enable(uint32_t mask)
Enable scalar chaining.
Definition ssr.h:119
void snrt_fpu_fence()
Synchronize the integer and float pipelines.
Definition ssr.h:39
snrt_ssr_reg_t
The SSR configuration registers.
Definition ssr.h:70
@ SNRT_SSR_REG_IDX_CFG
Definition ssr.h:75
@ SNRT_SSR_REG_RPTR
Definition ssr.h:78
@ SNRT_SSR_REG_WPTR
Definition ssr.h:79
@ SNRT_SSR_REG_BOUNDS
Definition ssr.h:73
@ SNRT_SSR_REG_RPTR_INDIR
Definition ssr.h:77
@ SNRT_SSR_REG_REPEAT
Definition ssr.h:72
@ SNRT_SSR_REG_STATUS
Definition ssr.h:71
@ SNRT_SSR_REG_STRIDES
Definition ssr.h:74
@ SNRT_SSR_REG_IDX_BASE
Definition ssr.h:76
snrt_ssr_dim_t
The different dimensions.
Definition ssr.h:60
@ SNRT_SSR_2D
Definition ssr.h:62
@ SNRT_SSR_1D
Definition ssr.h:61
@ SNRT_SSR_3D
Definition ssr.h:63
@ SNRT_SSR_4D
Definition ssr.h:64
static uint32_t read_ssr_cfg(const snrt_ssr_reg_t reg, const snrt_ssr_dm_t dm)
Read the value of an SSR configuration register.
Definition ssr.h:136
static void write_ssr_cfg(const snrt_ssr_reg_t reg, const snrt_ssr_dm_t dm, uint32_t value)
Write a value to an SSR configuration register.
Definition ssr.h:156